Skip to content
Commit 346729f6 authored by Paul Clarke's avatar Paul Clarke Committed by Tulio Magno Quites Machado Filho
Browse files

powerpc: fix check-before-set in SET_RESTORE_ROUND



A performance regression was introduced by commit
84d74e42 "powerpc: Cleanup fenv_private.h".

In the powerpc implementation of SET_RESTORE_ROUND, there is the
following code in the "SET" function (slightly simplified):
--
  old.fenv = fegetenv_register ();

  new.l = (old.l & _FPU_MASK_TRAPS_RN) | r; (1)

  if (new.l != old.l)                       (2)
    {
      if ((old.l & _FPU_ALL_TRAPS) != 0)
        (void) __fe_mask_env ();
      fesetenv_register (new.fenv);         (3)
--

Line (1) sets the value of "new" to the current value of FPSCR,
but masks off summary bits, exceptions, non-IEEE mode, and
rounding mode, then ORs in the new rounding mode.

Line (2) compares this new value to the current value in order to
avoid setting a new value in the FPSCR (line (3)) unless something
significant has changed (exception enables or rounding mode).

The summary bits are not germane to the comparison, but are cleared
in "new" and preserved in "old", resulting in false negative
comparisons, and unnecessarily setting the FPSCR in those cases
with associated negative performance impacts.

The solution is to treat the summaries identically for "new" and "old":
- save them in SET
- leave them alone otherwise
- restore the saved values in RESTORE

Also minor changes:
- expand _FPU_MASK_RN to 64bit hex, to match other MASKs
- treat bit 52 (left-to-right) as reserved (since it is)

	* sysdeps/powerpc/fpu/fenv_private.h (_FPU_MASK_TRAPS_RN):
	(_FPU_MASK_FRAC_INEX_RET_CC): Fix masks to more properly handle
	summary bits.
	(_FPU_MASK_RN): Expand _FPU_MASK_RN to 64bit hex.
	(_FPU_MASK_NOT_RN_NI): Treat bit 52 (left-to-right) as reserved.

Reviewed-by: default avatarTulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
parent 508b1e71
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment