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Commit f4cdb6a0 authored by Ralf Baechle's avatar Ralf Baechle
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MIPS: SEAD3: Enable LL/SC. 



All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 631b0af9
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