ARM: dts: socfpga: Add SPI Master1 for Arria10 SR chip (f2d6f8f8) · Commits · Mirrors / github.com / sifive_riscv-linux

Commit f2d6f8f8 authored Jun 02, 2016 by

Thor Thayer Committed by Dinh Nguyen Oct 18, 2016

ARM: dts: socfpga: Add SPI Master1 for Arria10 SR chip



Add the Altera Arria10 SPI Master Node in preparation for
the A10SR MFD node.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

parent ecba2390

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