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Commit ce206708 authored by Qiuxu Zhuo's avatar Qiuxu Zhuo Committed by Tony Luck
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EDAC/i10nm: Update driver to support different bus number config register offsets



The i10nm_edac driver failed to load on Ice Lake and Tremont/Jacobsville
servers if their CPU stepping >= 4 and failed on Ice Lake-D servers from
stepping 0. The root cause was that for Ice Lake and Tremont/Jacobsville
servers with CPU stepping >=4, the offset for bus number configuration
register was updated from 0xcc to 0xd0. For Ice Lake-D servers, all the
steppings use the updated 0xd0 offset.

Fix the issue by using the appropriate offset for bus number
configuration register according to the CPU model number and stepping.

Reported-by: default avatarJerry Chen <jerry.t.chen@intel.com>
Reported-and-tested-by: default avatarJin Wen <wen.jin@intel.com>
Signed-off-by: default avatarQiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Reviewed-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/linux-edac/20200427084022.GC11036@zn.tnic
parent ee5340ab
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