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Commit c8dd5110 authored by Boojin Kim's avatar Boojin Kim Committed by Kukjin Kim
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ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5



Since SYSRAM set the L2 cache latency on EXYNOS5 SoCs,
no longer need that in the kernel. It helps to reduce
booting time (no need cache disable and cache enable).

Signed-off-by: default avatarBoojin Kim <boojin.kim@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 65ab16fd
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