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Commit bf13e81b authored by Jani Nikula's avatar Jani Nikula Committed by Daniel Vetter
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drm/i915: add support for per-pipe power sequencing on vlv



VLV has per-pipe PP registers. Set up power sequencing on mode set. The
connector init time setup is problematic, since we don't have a pipe at
that time. Cook up something.

v2:
 - use vlv_power_sequencer_pipe() also in _pp_{ctrl,stat}_reg()
 - use PANEL_PORT_SELECT_DPC_VLV (Ville)

v3: make checkpatch happier

Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Make checkpatch a bit more happier still ...]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent a24c144c
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