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Unverified Commit 80c200b3 authored by Conor Dooley's avatar Conor Dooley Committed by Palmer Dabbelt
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RISC-V: resort all extensions in consistent orders



Ordering between each and every list of extensions is wildly
inconsistent. Per discussion on the lists pick the following policy:

- The array defining order in /proc/cpuinfo follows a narrow
  interpretation of the ISA specifications, described in a comment
  immediately presiding it.

- All other lists of extensions are sorted alphabetically.

This will hopefully allow for easier review & future additions, and
reduce conflicts between patchsets as the number of extensions grows.

Link: https://lore.kernel.org/all/20221129144742.2935581-2-conor.dooley@microchip.com/
Suggested-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarHeiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221205144525.2148448-3-conor.dooley@microchip.com
Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 99e2266f
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