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Commit 6ccf119a authored by Andrew Jones's avatar Andrew Jones Committed by Anup Patel
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KVM: riscv: selftests: Add RISCV_SBI_EXT_REG



While adding RISCV_SBI_EXT_REG(), acknowledge that some registers
have subtypes and extend __kvm_reg_id() to take a subtype field.
Then, update all macros to set the new field appropriately. The
general CSR macro gets renamed to include "GENERAL", but the other
macros, like the new RISCV_SBI_EXT_REG, just use the SINGLE subtype.

Signed-off-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 23e1dc45
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