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Commit 6a902b11 authored by Joshua Yeong's avatar Joshua Yeong Committed by Daniel Lezcano
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clocksource/timer-riscv: Add riscv_clock_shutdown callback



Add clocksource detach/shutdown callback to disable RISC-V timer interrupt when
switching out riscv timer as clock source

Signed-off-by: default avatarJoshua Yeong <joshua.yeong@starfivetech.com>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20231116105312.4800-1-joshua.yeong@starfivetech.com
parent e0cf6015
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