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Commit 61c11656 authored by Zhenyu Ye's avatar Zhenyu Ye Committed by Catalin Marinas
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arm64: tlb: don't set the ttl value in flush_tlb_page_nosync

flush_tlb_page_nosync() may be called from pmd level, so we
can not set the ttl = 3 here.

The callstack is as follows:

	pmdp_set_access_flags
		ptep_set_access_flags
			flush_tlb_fix_spurious_fault
				flush_tlb_page
					flush_tlb_page_nosync

Fixes: e735b98a

 ("arm64: Add tlbi_user_level TLB invalidation helper")
Reported-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarZhenyu Ye <yezhenyu2@huawei.com>
Link: https://lore.kernel.org/r/20200710094158.468-1-yezhenyu2@huawei.com
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 34e36d81
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