drm/nouveau/clock: fix missing pll type/addr when matching default entry
This issue is a regression from 70790f4f , and causes us to miss a special-case for C51 (NV4E) chipsets and return the wrong reference frequency for the VPLLs. Should fix fdo#56202 Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2c25b739
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