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Commit 429d939c authored by Yangbo Lu's avatar Yangbo Lu Committed by Ulf Hansson
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mmc: sdhci-of-esdhc: fix transfer mode register reading



The standard SD controller uses two 16-bit registers for
command sending.
0xC: Transfer Mode Register
0xE: Command Register

But the eSDHC controller uses one 32-bit register instead.
0xC: XFERTYPE

For Transfer Mode Register and Command Register writing,
the eSDHC driver will store Transfer Mode Register value in
a variable first. When Command Register writing happens,
driver will directly write a 32-bit value into XFERTYPE
register.

But for Transfer Mode Register reading, driver just returns
a actual value. This may cause issue for some read-modify-write
operations. We should make both reading and write on that variable
for Transfer Mode Register.

Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
Link: https://lore.kernel.org/r/20200117063858.37296-1-yangbo.lu@nxp.com
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 2fefc7c5
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