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Commit 3d1bf78c authored by Will Deacon's avatar Will Deacon
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Merge branch 'for-next/sve' into for-next/core

Optimise SVE switching for CPUs with 128-bit implementations.

* for-next/sve:
  arm64/sve: Skip flushing Z registers with 128 bit vectors
  arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()
  arm64/sve: Split _sve_flush macro into separate Z and predicate flushes
parents a4a49140 ad4711f9
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