Skip to content
Commit 2480c914 authored by WANG Xuerui's avatar WANG Xuerui Committed by Thomas Bogendoerfer
Browse files

MIPS: add definitions for Loongson-specific CP0.Diag1 register



This 32-bit CP0 register is named GSCause in Loongson manuals. It carries
Loongson extended exception information. We name it Diag1 because we
fear the "GSCause" name might get changed in the future.

Reviewed-by: default avatarHuacai Chen <chenhc@lemote.com>
Signed-off-by: default avatarWANG Xuerui <git@xen0n.name>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent efd1b4ad
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment