ASoC: Support FLL input clock selection on WM8994

The WM8994 FLL can be clocked from one of four inputs, the two MCLKs and
the LRCLK and BCLK of the AIF associated with the FLL. Allow all four
inputs to be used rather than defaulting to MCLK1.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>