arm: pxa: add clock pll selection bits (108f303f) · Commits · Mirrors / github.com / sifive_riscv-linux

Commit 108f303f authored Jul 30, 2014 by

Robert Jarzmik Committed by Mike Turquette Sep 30, 2014

arm: pxa: add clock pll selection bits



Add missing bits for CCCR and CCSR :
 - CPLL and PPLL selection, either full speed or 13MHz
 - CPSR masks

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

parent 53f3394a

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