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Commit 07700630 authored by Jie Wang's avatar Jie Wang Committed by Paolo Abeni
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net: hns3: add 5ms delay before clear firmware reset irq source

Currently the reset process in hns3 and firmware watchdog init process is
asynchronous. we think firmware watchdog initialization is completed
before hns3 clear the firmware interrupt source. However, firmware
initialization may not complete early.

so we add delay before hns3 clear firmware interrupt source and 5 ms delay
is enough to avoid second firmware reset interrupt.

Fixes: c1a81619

 ("net: hns3: Add mailbox interrupt handling to PF driver")
Signed-off-by: default avatarJie Wang <wangjie125@huawei.com>
Signed-off-by: default avatarJijie Shao <shaojijie@huawei.com>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 1a7be66e
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