Skip to content
  1. Dec 17, 2013
  2. Dec 14, 2013
    • Russell King's avatar
      ARM: fix asm/memory.h build error · b713aa0b
      Russell King authored
      Jason Gunthorpe reports a build failure when ARM_PATCH_PHYS_VIRT is
      not defined:
      
      In file included from arch/arm/include/asm/page.h:163:0,
                       from include/linux/mm_types.h:16,
                       from include/linux/sched.h:24,
                       from arch/arm/kernel/asm-offsets.c:13:
      arch/arm/include/asm/memory.h: In function '__virt_to_phys':
      arch/arm/include/asm/memory.h:244:40: error: 'PHYS_OFFSET' undeclared (first use in this function)
      arch/arm/include/asm/memory.h:244:40: note: each undeclared identifier is reported only once for each function it appears in
      arch/arm/include/asm/memory.h: In function '__phys_to_virt':
      arch/arm/include/asm/memory.h:249:13: error: 'PHYS_OFFSET' undeclared (first use in this function)
      
      Fixes: ca5a45c0
      
       ("ARM: mm: use phys_addr_t appropriately in p2v and v2p conversions")
      Tested-By: default avatarJason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      b713aa0b
  3. Dec 12, 2013
  4. Dec 11, 2013
  5. Dec 10, 2013
  6. Dec 09, 2013
  7. Dec 07, 2013
    • Tony Lindgren's avatar
      ARM: dts: Fix booting for secure omaps · f2e2c9d9
      Tony Lindgren authored
      Commit 7ce93f31
      
       (ARM: OMAP2+: Fix more missing data for omap3.dtsi file)
      fixed missing device tree data for omaps, but did not account for some of the
      hardware modules being inaccessible for secure omaps. This causes the
      following error on secure omaps:
      
      Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa0c5048
      SMP ARM
      Modules linked in:
      CPU: 0 PID: 1 Comm: swapper/0 Tainted: G        W    3.13.0-rc2+ #446
      task: ce057b40 ti: ce058000 task.ti: ce058000
      PC is at omap_aes_dma_stop+0x24/0x3c
      LR is at omap_aes_probe+0x1cc/0x584
         psr: 60000113
      sp : ce059e20  ip : ce0b4ee0  fp : 00000000
      r10: c0573ae8  r9 : c0749508  r8 : 00000000
      r7 : ce0b4e00  r6 : 00000000  r5 : ce0b4e10  r4 : ce274890
      r3 : fa0c5048  r2 : 00000048  r1 : 0000002c  r0 : ce274890
      Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      Control: 10c5387d  Table: 80004019  DAC: 00000015
      Process swapper/0 (pid: 1, stack limit = 0xce058248)
      Stack: (0xce059e20 to 0xce05a000)
      9e20: c0749508 0000a1ff 00000000 c016cd8c c06b5a06 ce2a45f0 ce2a4570 ce0b5fb0
      9e40: 00000000 480c5000 480c504f c0abe4e4 00000200 00000000 00000000 00000000
      9e60: ce0b4e10 ce0b4e10 c082da3c c082da3c c02b8c70 c077c610 c0749508 00000000
      9e80: 00000000 c02b9e7c c02b9e64 ce0b4e10 00000000 c02b8b20 ce0b4e10 ce0b4e44
      9ea0: c082da3c c02b8cd8 00000000 ce059eb8 c082da3c c02b7408 ce079edc ce0b1a34
      9ec0: c082da3c c082da3c ce2a0280 00000000 c08158d8 c02b8358 c0663405 c0663405
      9ee0: 00000073 c082da3c c079e4e8 c07ab3bc c0844340 c02b9334 00000000 00000006
      9f00: c079e4e8 c0008920 c067f6bf c0ac7c6b 00000000 c0712e28 00000000 00000000
      9f20: c0712e38 ce059f38 00000093 c0ac7c82 00000000 c0058994 00000000 c07130e8
      9f40: c07127b8 00000093 00000006 00000006 00000001 00000006 00000006 c079e4e8
      9f60: c07ab3bc c0844340 00000093 c0749508 c079e4f4 c0749c64 00000006 00000006
      9f80: c0749508 00000000 00000000 c0517e2c 00000000 00000000 00000000 00000000
      9fa0: 00000000 c0517e34 00000000 c000dfb8 00000000 00000000 00000000 00000000
      9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff ffffffff
      (omap_aes_probe+0x1cc/0x584)
      (platform_drv_probe+0x18/0x48)
      (driver_probe_device+0xb0/0x200)
      (__driver_attach+0x68/0x8c)
      (bus_for_each_dev+0x50/0x88)
      (bus_add_driver+0xcc/0x1c8)
      (driver_register+0x9c/0xe0)
      (do_one_initcall+0x98/0x140)
      (kernel_init_freeable+0x16c/0x23c)
      (kernel_init+0x8/0x100)
      (ret_from_fork+0x14/0x3c)
      Code: e1811002 e5932020 e590300c e0833002 (e593c000)
      
      Let's fix the issue by adding omap34xx-hs.dtsi and omap36xx-hs.dtsi and make
      n900, n9 and n950 to use them. This way we have the aes, sham and timer12
      disabled for secure devices the same way legacy booting does based on the
      omap34xx_gp_hwmod_ocp_ifs and omap36xx_gp_hwmod_ocp_ifs arrays in
      omap_hwmod_3xxx_data.c.
      
      Reported-by: default avatarSebastian Reichel <sre@debian.org>
      Acked-By: default avatarSebastian Reichel <sre@debian.org>
      Tested-by: default avatarAaro Koskinen <aaro.koskinen@iki.fi>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      f2e2c9d9
    • Nishanth Menon's avatar
      ARM: OMAP2+: Fix the machine entry for am3517 · caef4ee8
      Nishanth Menon authored
      
      
      The am3517 is wrongly booting as omap3 which means that the am3517
      specific devices like Ethernet won't work when booted with device
      tree. Now with the new devices defined in am3517.dtsi, let's use
      that instead of the omap3.dtsi, and add a separate machine entry
      for am3517 so am3517-evm can use it.
      
      Signed-off-by: default avatarNishanth Menon <nm@ti.com>
      [tony@atomide.com: updated comments and fixed build without omap3]
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      caef4ee8
    • Tony Lindgren's avatar
      ARM: dts: Fix missing entries for am3517 · a0158185
      Tony Lindgren authored
      
      
      On am3517 there are some extra devices compared to omap3.dtsi that
      we currently have not defined. Let's fix that by adding am3517.dtsi
      file.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      a0158185
    • Tony Lindgren's avatar
      ARM: OMAP2+: Fix overwriting hwmod data with data from device tree · 5e863c56
      Tony Lindgren authored
      We have some device tree properties where the ti,hwmod have multiple
      values:
      
      am33xx.dtsi:	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
      am4372.dtsi:	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
      dra7.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2";
      omap3.dtsi:	ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
      omap3.dtsi:	ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
      omap4.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
      omap5.dtsi:	ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
      
      That's not correct way of doing things in this case because these are
      separate devices with their own address space, interrupts, SYSCONFIG
      registers and can set their PM states independently.
      
      So they should all be fixed up to be separate devices in the .dts files.
      
      We also have the related data removed for at least omap4 in commit
      3b9b1015
      
       (ARM: OMAP4: hwmod data: Clean up the data file), so
      that data is wrongly initialized as null data.
      
      So we need to fix two bugs:
      
      1. We are only checking the first entry of the ti,hwmods property
      
         This means that we're only initializing the first hwmods entry
         instead of the ones listed in the ti,hwmods property.
      
      2. We are only checking the child nodes, not the nodes themselves
      
         This means that anything listed at OCP level is currently just
         ignored and unitialized and at least the omap4 case, with the
         legacy data missing from the hwmod.
      
      Fix both of the issues by using an index to the ti,hwmods property
      and changing the hwmod lookup function to also check the current node
      for ti,hwmods property instead of just the children.
      
      While at it, let's also add some warnings for the bad data so it's
      easier to fix.
      
      Cc: "Benoît Cousson" <bcousson@baylibre.com>
      Acked-by: default avatarPaul Walmsley <paul@pwsan.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      5e863c56
  8. Dec 05, 2013
  9. Dec 04, 2013
  10. Dec 03, 2013
  11. Dec 02, 2013
  12. Dec 01, 2013
    • Fabio Estevam's avatar
      ARM: 7907/1: lib: delay-loop: Add align directive to fix BogoMIPS calculation · 11d4bb1b
      Fabio Estevam authored
      
      
      Currently mx53 (CortexA8) running at 1GHz reports:
      Calibrating delay loop... 663.55 BogoMIPS (lpj=3317760)
      
      Tom Evans verified that alignments of 0x0 and 0x8 run the two instructions of __loop_delay in one clock cycle (1 clock/loop), while alignments of 0x4 and 0xc take 3 clocks to run the loop twice. (1.5 clock/loop)
      
      The original object code looks like this:
      
      00000010 <__loop_const_udelay>:
        10:	e3e01000 	mvn	r1, #0
        14:	e51f201c 	ldr	r2, [pc, #-28]	; 0 <__loop_udelay-0x8>
        18:	e5922000 	ldr	r2, [r2]
        1c:	e0800921 	add	r0, r0, r1, lsr #18
        20:	e1a00720 	lsr	r0, r0, #14
        24:	e0822b21 	add	r2, r2, r1, lsr #22
        28:	e1a02522 	lsr	r2, r2, #10
        2c:	e0000092 	mul	r0, r2, r0
        30:	e0800d21 	add	r0, r0, r1, lsr #26
        34:	e1b00320 	lsrs	r0, r0, #6
        38:	01a0f00e 	moveq	pc, lr
      
      0000003c <__loop_delay>:
        3c:	e2500001 	subs	r0, r0, #1
        40:	8afffffe 	bhi	3c <__loop_delay>
        44:	e1a0f00e 	mov	pc, lr
      
      After adding the 'align 3' directive to __loop_delay (align to 8 bytes):
      
      00000010 <__loop_const_udelay>:
        10:	e3e01000 	mvn	r1, #0
        14:	e51f201c 	ldr	r2, [pc, #-28]	; 0 <__loop_udelay-0x8>
        18:	e5922000 	ldr	r2, [r2]
        1c:	e0800921 	add	r0, r0, r1, lsr #18
        20:	e1a00720 	lsr	r0, r0, #14
        24:	e0822b21 	add	r2, r2, r1, lsr #22
        28:	e1a02522 	lsr	r2, r2, #10
        2c:	e0000092 	mul	r0, r2, r0
        30:	e0800d21 	add	r0, r0, r1, lsr #26
        34:	e1b00320 	lsrs	r0, r0, #6
        38:	01a0f00e 	moveq	pc, lr
        3c:	e320f000 	nop	{0}
      
      00000040 <__loop_delay>:
        40:	e2500001 	subs	r0, r0, #1
        44:	8afffffe 	bhi	40 <__loop_delay>
        48:	e1a0f00e 	mov	pc, lr
        4c:	e320f000 	nop	{0}
      
      , which now reports:
      Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
      
      Some more test results:
      
      On mx31 (ARM1136) running at 532 MHz, before the patch:
      Calibrating delay loop... 351.43 BogoMIPS (lpj=1757184)
      
      On mx31 (ARM1136) running at 532 MHz after the patch:
      Calibrating delay loop... 528.79 BogoMIPS (lpj=2643968)
      
      Also tested on mx6 (CortexA9) and on mx27 (ARM926), which shows the same
      BogoMIPS value before and after this patch.
      
      Reported-by: default avatarTom Evans <tom_usenet@optusnet.com.au>
      Suggested-by: default avatarTom Evans <tom_usenet@optusnet.com.au>
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      11d4bb1b
    • Dave Martin's avatar
      ARM: 7897/1: kexec: Use the right ISA for relocate_new_kernel · e2ccba49
      Dave Martin authored
      
      
      Copying a function with memcpy() and then trying to execute the
      result isn't trivially portable to Thumb.
      
      This patch modifies the kexec soft restart code to copy its
      assembler trampoline relocate_new_kernel() using fncpy() instead,
      so that relocate_new_kernel can be in the same ISA as the rest of
      the kernel without problems.
      
      Signed-off-by: default avatarDave Martin <Dave.Martin@arm.com>
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Reported-by: default avatarTaras Kondratiuk <taras.kondratiuk@linaro.org>
      Tested-by: default avatarTaras Kondratiuk <taras.kondratiuk@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      e2ccba49