- Feb 17, 2014
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Andrew Lunn authored
Perform a mechanical translation of rd88f6281-setup.c into DT. Since the hardware differs between the A0 and A1 stepping, two dts files are used, and a .dtsi file for the common parts. The A0 part does not have a "wan" port on the switch and uses PHY address 10 to address the switch. The A1 part does have the "wan" port and uses address 0. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
Mechanically translate rd88f6192-nas-setup.c into DT equivelent. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
In addition to the analog audio input and output, the Armada 370 DB also has S/PDIF input and output optical connectors. This commit improves the Device Tree description of the Armada 370 DB platform to enable the S/PDIF support. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
This commit adds the necessary Device Tree informations to enable audio support on the Armada 370 DB platform. In details it: * Instantiates the CS42L51 audio codec on the I2C0 bus, and configures this bus with the appropriate pin-muxing configuration. * Enables the I2S audio controller, and configures it with the appropriate pin-muxing configuration. * Through hog pins, ensures that the other pins possibly used for I2S are muxed with another function than I2S. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
This commit adds a pin-muxing configuration for the I2C0 bus of the Armada 370, which is used on the Armada 370 DB platform to interface with the CS42L51 audio codec. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
The Armada 370 SoC has an I2S audio controller. This commit adds the description of this controller to the Device Tree describing this SoC, as well as two possible muxing configurations for the I2S bus pins. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Feb 12, 2014
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Thomas Petazzoni authored
Instead of harcoding keycodes specifications in the Armada 370/XP boards, use the <dt-bindings/input/input.h> header file and its keycode definitions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
Instead of harcoding 0 and 1 for the gpio specifications in the Armada 370/XP boards, use the <dt-bindings/gpio/gpio.h> header file and its GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW definitions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Feb 05, 2014
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Andrew Lunn authored
Re-implement the Marvell Kirkwood ts41x-setup.c in DT. As with the QNAP 119, there are two variants, depending on which SoC has been used. They differ on Ethernet PHY addresses and number of PCIe busses. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Ian Campbell <ijc@hellion.org.uk> (kirkwood-ts419-6281.dtb) Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
The Excito Bubba B3 is a home server, single drive NAS box, Wifi access point, etc. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Feb 01, 2014
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Tim Kryger authored
The board schematic states that the "SD_CARD_DET_N gets pulled to GND when card is inserted" so the polarity has been updated to active low. Polarity is now specified with a GPIO define instead of a magic number. Signed-off-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Soren Brinkmann authored
Add nodes for the Arasan SDHCI controller to Zynq dts files. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Stephen Boyd authored
Add the necessary DT nodes to probe the clock controllers on MSM devices as well as hook up the uart nodes to the clock controllers. This should allow us to boot to a serial console on all DT enabled MSM platforms. Cc: David Brown <davidb@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Jan 29, 2014
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Boris BREZILLON authored
Add watchdog specific config for kizbox board. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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Boris BREZILLON authored
Set default watchdog options in every SoC compatible with the sam9 watchdog. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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- Jan 27, 2014
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Russell King authored
Add support for the SolidRun Cubox-i devices. This commit adds similar basic support as the HummingBoard. Further devices will be supported in future patches. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Add support for the SolidRun HummingBoard. This commit adds support for the following interfaces on this board: - Consumer Ir receiver - S/PDIF output - Both USB interfaces - Gigabit Ethernet using AR8035 - UART port Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- Jan 24, 2014
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Jonas Jensen authored
When a skeleton "clocks { .. }" remain in .dtsi, the child node can be moved to .dts, "ref12" is then found by of_clk_get(). Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Jan 21, 2014
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Stefan Agner authored
Depending on the regulator version, the voltage table might be different. Use version specific regulator tables in order to select correct voltage table. For the following regulator versions different voltage tables are now used: * TPS658623: Use correct voltage table for SM2 * TPS658643: New voltage table for SM2 Both versions are in use on the Colibri T20 module. Make use of the correct tables by requesting the correct SM2 voltage of 1.8V. This change is not backward compatible since an old driver is not able to correctly set that value. The value 1.8V is out of range for the old driver and will refuse to probe the device. The regulator starts with default settings and the driver shows appropriate error messages. On Colibri T20, the old value used to work with TPS658623 since the driver applied a wrong voltage table too. However, the TPS658643 used on V1.2 devices uses yet another voltage table and those broke that pseudo-compatibility. The regulator driver now has the correct voltage table for both regulator versions and those the correct voltage can be used in the device tree. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-by: Mark Brown <broonie@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Ben Dooks authored
The R8A7790's dtsi file i2c0, i2c1, i2c2, and i2c3 nodes have clock references to the mstp3_clks clock node, however these clocks are in the mstp9_clks node. The error was introducted in 72197ca7 ("ARM: shmobile: r8a7790: Reference clocks") which is in Simon's current development tree. This patch fixes the following error: of_clk_src_onecell_get: invalid clock index 31 i2c-rcar e6508000.i2c: cannot get clock i2c-rcar: probe of e6508000.i2c failed with error -2 Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- Jan 18, 2014
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Tero Kristo authored
This patch creates a unique node for each clock in the AM43xx power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Tero Kristo authored
AM35xx now uses the clock data from device tree. Most of the data is shared with OMAP3xxx, but as there is some delta, a new base .dtsi file is also created for the SoC. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Tero Kristo authored
This patch creates a unique node for each clock in the OMAP3 power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Tero Kristo authored
This patch creates a unique node for each clock in the AM33xx power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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J Keerthy authored
This patch adds optfclk_pciephy_clk and optfclk_pciephy_div_clk which are used by PCIe phy. It also adds a mux clock to choose the source of optfclk_pciephy_div_clk clock. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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J Keerthy authored
This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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J Keerthy authored
The patch adds a mux node to choose the parent of apll_pcie_ck node. Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Tero Kristo authored
This patch creates a unique node for each clock in the DRA7 power, reset and clock manager (PRCM). TODO: apll_pcie clock node is still a dummy in this version, and proper support for the APLL should be added. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Tero Kristo authored
This patch creates a unique node for each clock in the OMAP5 power, reset and clock manager (PRCM). Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Tero Kristo authored
This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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- Jan 17, 2014
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Grant Likely authored
device_type is deprecated and the kernel doesn't require it in most cases. The only exceptions for flat tree users are the "gianfar", "ucc_geth" and "ibm,emac" bindings, and arguably that requirement could be relaxed for ucc_geth and ibm,emac (that is a task for separate patches though). This patch removes references to device_type="network" from the binding documentation where possible and removes the properties from ARM and microblaze dts files. This patch does not modify the powerpc .dts files since there are a much larger number of them affected and I think the ucc_geth, ibm,emac and gianfar users should be addressed before clearing out the references to reduce the chance of breakage. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>
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- Jan 16, 2014
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Sherman Yin authored
Enable pinctrl for Broadcom Capri (BCM281xx) SoCs. Signed-off-by: Sherman Yin <syin@broadcom.com> Reviewed-by: Christian Daudt <bcm@fixthebug.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Grant Likely authored
The device_type property is deprecated for the flattened device tree and the value "ethernet-phy" has never been defined as having a useful meaning. Neither the kernel nor u-boot depend on it. It should never have appeared in PHY bindings. This patch removes all references to "ethernet-phy" as a device_type value from the documentation and the .dts files. This patch was generated mechanically with the following command and then verified by looking at the diff. sed -i '/"ethernet-phy"/d' `git grep -l '"ethernet-phy"'` Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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- Jan 15, 2014
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Simon Guinot authored
This patch updates the Armada 370/XP SATA node with the new compatible string "marvell,armada-370-sata". Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Lior Amsalem <alior@marvell.com> Cc: stable@vger.kernel.org # v3.6+ Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Tejun Heo <tj@kernel.org>
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- Jan 13, 2014
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Nicolin Chen authored
This reverts commit b1d27c79. Previously we switched the SSI scriprt to dual-fifo mode to reduce playback underrun issue, which is only included by SDMA firmware version 2. However, there are quite a lot people still using version 1 or default firmware in the ROM code of SoC while these two kinds of firmwares do not support the dual-fifo script and the audio function on their platform would be broken. Thus this patch provisionally reverts the dual-fifo script to the original single fifo script to meet all kinds of users' requirements, including the version 1/2 or inner ROM firmware. Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- Jan 11, 2014
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Stephen Boyd authored
The summary interrupt is #16 in the SPI space. Unfortunately, when this device was translated from board files to DT we forgot to subtract 16 from the interrupt number to translate it into a SPI interrupt. Also, the register space is larger than 4k, increase it appropriately so that the gpio driver doesn't try to access registers outside of its mapping. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>
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- Jan 09, 2014
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Rongjun Ying authored
add pin groups for USP0 only holding one of TX and RX frame sync. this patch matches with the change in drivers/pinctrl/sirf. Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Barry Song <Barry.Song@csr.com>
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Qipan Li authored
this patch adds lost usp1_uart_nostreamctrl pin group for atlas6, which matches with the change in drivers/pinctrl/sirf/pinctrl-atlas6.c. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
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Xianglong Du authored
This patch adds lost minigpsrtc device node for prima2 and atlas6, which is behind rtc-iobg and whose offset is 2000. Signed-off-by: Xianglong Du <Xianglong.Du@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
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Rongjun Ying authored
prima2 and atlas6 uses cpufreq_cpu0, here we put related clock, operation points in dtsi. Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
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