This board is based on the M28 SoM with custom baseboard. Supported
are LEDs, ethernet, PWM, LCD, SD slots.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

GPIO3_29 is used to reset the ethernet phy.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

GPIO1_25 is used to reset the ethernet phy.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

MX6QDL_PAD_EIM_D23__GPIO3_IO23 pin is used to reset the ethernet phy.

Add it to the 'hog' group.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Add pcie device node for imx6qdl.

Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

For more information about the Udoo board:
http://www.udoo.org/



Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Add pinmux for 4-bit SD card connected to SSP2.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Add initial PHYTEC VF610 Cosmic/Cosmic+ board support with
UART and FEC enabled.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

This pin definition had been added after the initial patch to use
symbolic pin names in DTS files.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Update the Ka-Ro TX28 DTS file.

- add Copyright header
- use label references for better readability
- sort the entries alphabetically
- add some aliases used by U-Boot to modify the DT data

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

For some reason, the select input of pin function USB_OTG_ID is not
implemented via a regular select input register but using the bit
USB_OTG_ID_ SEL (shift 13) of IOMUXC_GPR1 register (offset 0x4).

As per the workaround for such quirk implemented in pinctrl driver,
we need to compose the input_val cell as below.

	31     23      15      7        0
	| 0xff | shift | width | select |

Thus, we have 0xff0d0100 for MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID and
0xff0d0101 for MX6QDL_PAD_GPIO_1__USB_OTG_ID in input_val cell.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

Convert mx23/mx28 dts files to use the padconfig defintions from
mxs-pinfunc.h.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Convert mx23/mx28 dts filed to use the pinctrl header files.

NOTE: During automatic conversion of these files to use the pinconfig
definitions an inconsistency has been found in:
arch/arm/boot/dts/imx28-apx4devkit.dts

According to the comment the function for pad SSP2_SS0 should have
been MX28_PAD_SSP2_SS0__GPIO_2_19, while the given value 0x2131
represents: MX28_PAD_SSP2_SS0__AUART3_TX

I used the later (though probably wrong) definition because that's
what is actually being used in the DTB.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Remove the list of possible pin configurations from the documentation
file and create header files containing those definitions.
This eliminates the need for error-prone manual lookup of those values
in the documentation and guarantees consistency between the human
readable representation of the pad function in the .dts file and the
actual binary value used in DT.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Provide 'lradc-touchscreen-wires' property to the LRADC driver, so that
touchscreen can be functional.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

On imx6qdl-sabresd the SDHC2 and SDHC3 are 8 bit-wide, so pass the bus-width
property to reflect that.

Otherwise the mmc driver will operate with the default bus-width value of 4.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

This is needed for supporting ultra high speed cards like SD3.0 cards.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Add spi aliases.

While at it, keep the aliases entries sorted.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Enable USB function for OTG 1 and OTG 2 at mx6sololite evk.
Besides, fix the wrong interrupt number for OTG2 and host 1.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Add iomuxc gpr device node for imx6sl.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

This patch enables DSPI0 and at26df081a flash device for Vybrid VF610
TOWER board.

Signed-off-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Add Freescale DSPI node into vf610 dts.

Signed-off-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

imx6q-sabrelite board can be connected to a 1024x768 Hannstar LVDS panel.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Put the nodes in alphabetical order so that further node additions can be better
organized.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Trying to use the usb otg port on mx53qsb results in the following error:

$ modprobe g_ether
using random self ethernet address
using random host ethernet address
usb0: HOST MAC 52:0f:8a:1e:aa:09
usb0: MAC de:f3:70:d8:6c:62
using random self ethernet address
using random host ethernet address
g_ether gadget: Ethernet Gadget, version: Memorial Day 2008
g_ether gadget: g_ether ready

(Connect the USB cable)

$ ci_hdrc ci_hdrc.0: remove, state 4
usb usb1: USB disconnect, device number 1
ci_hdrc ci_hdrc.0: USB bus 1 deregistered
ci_hdrc ci_hdrc.0: timeout waiting for 00000800 in 11

USB otg port goes to connector J3 (mini USB) and also to the USB combo (J2).

As mx53qsb does not provide a USB ID pin, pass the dr_mode as 'peripheral' so
that we can have usb device working.

Tested via g_ether.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Testing g_ether results in the following:

[    1.648022] using random self ethernet address
[    1.652778] using random host ethernet address
[    1.660504] usb0: HOST MAC c6:28:6a:81:dc:ff
[    1.666360] usb0: MAC 7e:81:54:16:c0:c6
[    1.670504] using random self ethernet address
[    1.675842] using random host ethernet address
[    1.682655] g_ether gadget: Ethernet Gadget, version: Memorial Day 2008
[    1.689332] g_ether gadget: g_ether ready
[    3.328974] irq 237: nobody cared (try booting with the "irqpoll" option)
[    3.335831] CPU: 0 PID: 1 Comm: swapper Not tainted 3.11.0-rc6-next-20130819 #1035
[    3.343500] [<c0014258>] (unwind_backtrace+0x0/0xf0) from [<c0011b20>] (show_stack+0x10/0x14)
[    3.352098] [<c0011b20>] (show_stack+0x10/0x14) from [<c006af4c>] (__report_bad_irq+0x20/0xc0)
[    3.360763] [<c006af4c>] (__report_bad_irq+0x20/0xc0) from [<c006b3f4>] (note_interrupt+0x1d4/0x234)
[    3.369943] [<c006b3f4>] (note_interrupt+0x1d4/0x234) from [<c0069754>] (handle_irq_event_percpu+0xc4/0x268)
[    3.379815] [<c0069754>] (handle_irq_event_percpu+0xc4/0x268) from [<c0069934>] (handle_irq_event+0x3c/0x5c)
[    3.389686] [<c0069934>] (handle_irq_event+0x3c/0x5c) from [<c006bb78>] (handle_level_irq+0x8c/0xe8)
[    3.398865] [<c006bb78>] (handle_level_irq+0x8c/0xe8) from [<c0068ff0>] (generic_handle_irq+0x20/0x30)
[    3.408213] [<c0068ff0>] (generic_handle_irq+0x20/0x30) from [<c000fc9c>] (handle_IRQ+0x30/0x84)
[    3.417040] [<c000fc9c>] (handle_IRQ+0x30/0x84) from [<c0012564>] (__irq_svc+0x44/0x54)
[    3.425094] [<c0012564>] (__irq_svc+0x44/0x54) from [<c0020244>] (__do_softirq+0x90/0x268)
[    3.433400] [<c0020244>] (__do_softirq+0x90/0x268) from [<c00207d4>] (irq_exit+0x9c/0xd8)
[    3.441619] [<c00207d4>] (irq_exit+0x9c/0xd8) from [<c000fca0>] (handle_IRQ+0x34/0x84)
[    3.449577] [<c000fca0>] (handle_IRQ+0x34/0x84) from [<c0012564>] (__irq_svc+0x44/0x54)
[    3.457629] [<c0012564>] (__irq_svc+0x44/0x54) from [<c04602b0>] (_raw_spin_unlock_irqrestore+0x34/0x44)
[    3.467164] [<c04602b0>] (_raw_spin_unlock_irqrestore+0x34/0x44) from [<c0348298>] (input_register_handler+0x98/0xb4)
[    3.477835] [<c0348298>] (input_register_handler+0x98/0xb4) from [<c064bc10>] (mousedev_init+0x30/0x60)
[    3.487275] [<c064bc10>] (mousedev_init+0x30/0x60) from [<c00088ac>] (do_one_initcall+0xe8/0x154)
[    3.496198] [<c00088ac>] (do_one_initcall+0xe8/0x154) from [<c062aabc>] (kernel_init_freeable+0xf0/0x1b4)
[    3.505810] [<c062aabc>] (kernel_init_freeable+0xf0/0x1b4) from [<c0456550>] (kernel_init+0x8/0xe4)
[    3.514899] [<c0456550>] (kernel_init+0x8/0xe4) from [<c000ee60>] (ret_from_fork+0x14/0x34)
[    3.523263] handlers:
[    3.525578] [<c0339d14>] ci_irq
[    3.528757] Disabling IRQ #237

Provide the USB0_ID pin in the usb0 node, so that g_ether can operate
correctly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Tested via g_ether:

$ modprobe g_ether
using random self ethernet address
using random host ethernet address
usb0: HOST MAC 42:b5:26:a9:48:21
usb0: MAC 36:a6:85:9b:9e:13
using random self ethernet address
using random host ethernet address
g_ether gadget: Ethernet Gadget, version: Memorial Day 2008
g_ether gadget: g_ether ready
$ g_ether gadget: high-speed config #1: CDC Ethernet (ECM)
$ ifconfig usb0 10.0.0.2

Then on the PC host side:

~$ sudo ifconfig usb0 10.0.0.1
~$ ping 10.0.0.2
PING 10.0.0.2 (10.0.0.2) 56(84) bytes of data.
64 bytes from 10.0.0.2: icmp_req=1 ttl=64 time=1.26 ms
64 bytes from 10.0.0.2: icmp_req=2 ttl=64 time=0.280 ms
64 bytes from 10.0.0.2: icmp_req=3 ttl=64 time=0.297 ms

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

This patch adds the missing W1 (onewire) devicetree node for i.MX51 CPUs.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

This patch adds the missing IRAM devicetree node for i.MX51 CPUs.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

RTS/CTS pins can be used for different purposes, so create separate
definitions for these pins.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

There is no imx6sl specific sdma firmware.  Instead, imx6sl reuses
imx6q sdma firmware.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id
for cpu clock which refers to virtual platform device. It needs to
be "cpu0" instead which is actual cpu0 device id.

This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0".

Reported-and-tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id
for cpu clock which refers to virtual platform device. It needs to
be "cpu0" instead which is actual cpu0 device id.

This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0".

Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

Commit cdc58d60

 "cpufreq: imx6q-cpufreq:
remove device tree parsing for cpu nodes" assumed the pdev->dev is set to
cpu0 device in the platform code. But it actually points to the virtual
cpufreq-cpu0 platform device which is not present in the device tree.
Most of the information needed by cpufreq is stored in cpu0 DT node.
So cpu_dev must point to cpu0 device.

This patch fixes the wrong assignment to cpu_dev.

Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

This is just a standard board for the Ux500, include it in the
v7 multiplatform defconfig.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Fix trivial typo in name.

Signed-off-by: Phil Carmody <phil.carmody@partner.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Corrected the functions spelling mistake in the OMAP4 SMP source file.

Signed-off-by: Anoop Thomas Mathew <atm@profoundis.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

We call cpu_cluster_pm_enter for dev->cpu == 0 only, but
cpu_cluster_pm_exit called without that check.

Because of that unhandled page fault may happen:

[    3.803405] Unable to handle kernel paging request at virtual address 00002500
[    3.810974] pgd = c0004000
[    3.813812] [00002500] *pgd=00000000
[    3.817596] Internal error: Oops: 5 [#1] SMP ARM
[    3.822418] Modules linked in:
[    3.825653] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.11.0-rc6+ #21
[    3.832397] task: ed86ef40 ti: ed896000 task.ti: ed896000
[    3.838073] PC is at irq_notifier+0x234/0x25c
[    3.842651] LR is at irq_notifier+0x218/0x25c
[    3.847229] pc : [<c0029ed8>]    lr : [<c0029ebc>]    psr: 80000193
[    3.847229] sp : ed897ee8  ip : 00000005  fp : 00000001
[    3.859283] r10: c0b395f0  r9 : c0b30594  r8 : c0b8c2ac
[    3.864776] r7 : ffffffff  r6 : 00000000  r5 : 00000005  r4 : 00000000
[    3.871643] r3 : 00002500  r2 : 00000000  r1 : 00000005  r0 : 44302244
[    3.878479] Flags: Nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
[    3.886260] Control: 10c5387d  Table: 8000404a  DAC: 00000015
[    3.892272] Process swapper/1 (pid: 0, stack limit = 0xed896240)
[    3.898590] Stack: (0xed897ee8 to 0xed898000)
[    3.903167] 7ee0:                   c0979c3a 00000001 ed897ef8 ed896000 c0014f7c 00000000
[    3.911743] 7f00: 00000005 00000000 ffffffff c0b8c2ac c0b395f0 c077c04c c0c94b48 c0b3953c
[    3.920318] 7f20: c0bcd928 00000002 c0b39524 c00cfad8 00000000 ffffffff 00000000 c00cfb10
[    3.928924] 7f40: c14e62c0 c002c1c8 c002c0ac c14e62c0 00000002 e251c37d 00000000 c0b39548
[    3.937499] 7f60: c0b395f0 c05a1bc4 e251c37d 00000000 00000005 c05a3870 edc90380 edc90380
[    3.946105] 7f80: edc90394 c14e62c0 c0b39548 00000002 c0784064 c05a3c78 c0b395e0 c14e62c0
[    3.954681] 7fa0: 00000002 c0b39548 c0bc9db8 00000000 00000001 c05a1dc0 ed896000 00000015
[    3.963287] 7fc0: c0bc9db8 ed896000 8000406a c0b30594 c0784064 c000e504 00000746 c007a528
[    3.971862] 7fe0: 00000001 0000001d 600001d3 c0bcc004 00000000 800086c4 ee0aa6a7 d2aabaa9
[    3.980499] [<c0029ed8>] (irq_notifier+0x234/0x25c) from [<c077c04c>] (notifier_call_chain+0x38/0x68)
[    3.990173] [<c077c04c>] (notifier_call_chain+0x38/0x68) from [<c00cfad8>] (cpu_pm_notify+0x20/0x38)
[    3.999786] [<c00cfad8>] (cpu_pm_notify+0x20/0x38) from [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50)
[    4.009399] [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50) from [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c)
[    4.020111] [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c) from [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec)
[    4.030822] [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec) from [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240)
[    4.041870] [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240) from [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228)
[    4.052947] [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228) from [<c000e504>] (arch_cpu_idle+0x8/0x38)
[    4.062499] [<c000e504>] (arch_cpu_idle+0x8/0x38) from [<c007a528>] (cpu_startup_entry+0x178/0x1e4)
[    4.071990] [<c007a528>] (cpu_startup_entry+0x178/0x1e4) from [<800086c4>] (0x800086c4)
[    4.080383] Code: e5922288 03a03b0a 13a03c25 e0823003 (e5932000)
[    4.086791] ---[ end trace d83954a84a6fa69e ]---

It is supposed that sar_base is initialized in irq_save_context, which
is called on CPU_CLUSTER_PM_ENTER notification. If this notification
has been missed and CPU_CLUSTER_PM_EXIT is received sar_base is NULL.

Fix it by calling CPU_CLUSTER_PM_{ENTER,EXIT} under the same condition.

Signed-off-by: Vladimir Murzin <murzin.v@gmail.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

When CONFIG_ARM_LPAE=y the following build warning is generated:

arch/arm/mach-omap2/gpmc.c:1495:4: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat]

According to Documentation/printk-formats.txt '%pa' can be used to properly
print 'resource_size_t'.

Reported-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>