Skip to content
  1. Jan 21, 2023
  2. Jan 20, 2023
    • Arkadiusz Kubalewski's avatar
      ice: use GNSS subsystem instead of TTY · c7ef8221
      Arkadiusz Kubalewski authored
      
      
      Previously support for GNSS was implemented as a TTY driver, it allowed
      to access GNSS receiver on /dev/ttyGNSS_<bus><func>.
      
      Use generic GNSS subsystem API instead of implementing own TTY driver.
      The receiver is accessible on /dev/gnss<id>. In case of multiple receivers
      in the OS, correct device can be found by enumerating either:
      - /sys/class/net/<eth port>/device/gnss/
      - /sys/class/gnss/gnss<id>/device/
      
      Using GNSS subsystem is superior to implementing own TTY driver, as the
      GNSS subsystem was designed solely for this purpose. It also implements
      TTY driver but in a common and defined way.
      
      From user perspective, there is no difference in communicating with a
      device, except new path to the device shall be used. The device will
      provide same information to the userspace as the old one, and can be used
      in the same way, i.e.:
      old # gpsmon /dev/ttyGNSS_2100_0
      new # gpsmon /dev/gnss0
      There is no other impact on userspace tools.
      
      User expecting onboard GNSS receiver support is required to enable
      CONFIG_GNSS=y/m in kernel config.
      
      Reviewed-by: default avatarAlexander Lobakin <alexandr.lobakin@intel.com>
      Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
      Signed-off-by: default avatarMichal Michalik <michal.michalik@intel.com>
      Signed-off-by: default avatarArkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
      Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
      Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      Acked-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c7ef8221
    • Andy Shevchenko's avatar
      net: hns: Switch to use acpi_evaluate_dsm_typed() · 498fe810
      Andy Shevchenko authored
      
      
      The acpi_evaluate_dsm_typed() provides a way to check the type of the
      object evaluated by _DSM call. Use it instead of open coded variant.
      
      Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Reviewed-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      498fe810
    • Andy Shevchenko's avatar
      ACPI: utils: Add acpi_evaluate_dsm_typed() and acpi_check_dsm() stubs · 1b94ad7c
      Andy Shevchenko authored
      
      
      When the ACPI part of a driver is optional the methods used in it
      are expected to be available even if CONFIG_ACPI=n. This is not
      the case for _DSM related methods. Add stubs for
      acpi_evaluate_dsm_typed() and acpi_check_dsm() methods.
      
      Reported-by: default avatarkernel test robot <lkp@intel.com>
      Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1b94ad7c
    • David Morley's avatar
      tcp: fix rate_app_limited to default to 1 · 300b655d
      David Morley authored
      
      
      The initial default value of 0 for tp->rate_app_limited was incorrect,
      since a flow is indeed application-limited until it first sends
      data. Fixing the default to be 1 is generally correct but also
      specifically will help user-space applications avoid using the initial
      tcpi_delivery_rate value of 0 that persists until the connection has
      some non-zero bandwidth sample.
      
      Fixes: eb8329e0 ("tcp: export data delivery rate")
      Suggested-by: default avatarYuchung Cheng <ycheng@google.com>
      Signed-off-by: default avatarDavid Morley <morleyd@google.com>
      Signed-off-by: default avatarNeal Cardwell <ncardwell@google.com>
      Tested-by: default avatarDavid Morley <morleyd@google.com>
      Reviewed-by: default avatarEric Dumazet <edumazet@google.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      300b655d
    • Kees Cook's avatar
      bnxt: Do not read past the end of test names · d3e599c0
      Kees Cook authored
      
      
      Test names were being concatenated based on a offset beyond the end of
      the first name, which tripped the buffer overflow detection logic:
      
       detected buffer overflow in strnlen
       [...]
       Call Trace:
       bnxt_ethtool_init.cold+0x18/0x18
      
      Refactor struct hwrm_selftest_qlist_output to use an actual array,
      and adjust the concatenation to use snprintf() rather than a series of
      strncat() calls.
      
      Reported-by: default avatarNiklas Cassel <Niklas.Cassel@wdc.com>
      Link: https://lore.kernel.org/lkml/Y8F%2F1w1AZTvLglFX@x1-carbon/
      
      
      Tested-by: default avatarNiklas Cassel <Niklas.Cassel@wdc.com>
      Fixes: eb513658 ("bnxt_en: Add basic ethtool -t selftest support.")
      Cc: Michael Chan <michael.chan@broadcom.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Eric Dumazet <edumazet@google.com>
      Cc: Jakub Kicinski <kuba@kernel.org>
      Cc: Paolo Abeni <pabeni@redhat.com>
      Cc: netdev@vger.kernel.org
      Signed-off-by: default avatarKees Cook <keescook@chromium.org>
      Reviewed-by: default avatarMichael Chan <michael.chan@broadcom.com>
      Reviewed-by: default avatarNiklas Cassel <niklas.cassel@wdc.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d3e599c0
    • David S. Miller's avatar
      Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue · ba197fde
      David S. Miller authored
      
      
      Tony Nguyen says:
      
      ====================
      Intel Wired LAN Driver Updates 2023-01-19 (ice)
      
      This series contains updates to ice driver only.
      
      Tsotne and Anatolii implement new handling, and AdminQ command, for
      firmware LLDP, adding a pending notification to allow for proper
      cleanup between TC changes.
      
      Amritha extends support for drop action outside of switchdev.
      
      Siddaraju adjusts restriction for PTP HW clock adjustments.
      
      Ani removes an unneeded non-null check and improves reporting of some link
      modes to utilize more appropriate values.
      
      Jesse adds checks to ensure PF VSI type.
      
      Przemek combines duplicate checks of the same condition into one check.
      
      Tony makes various cleanups to code: removes comments for cppcheck
      suppressions, reduces scope of some variables, changes some return
      statements to reflect an explicit 0 return, matches naming for function
      declaration and definition, adds local variable for readability, and
      fixes indenting.
      
      Sergey separates DDP (Dynamic Device Personalization) code into its own
      file.
      ====================
      
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ba197fde
    • David S. Miller's avatar
      Merge branch 'net-dcb-rewrite-table' · f5339209
      David S. Miller authored
      
      
      Daniel Machon says:
      
      ====================
      net: Introduce new DCB rewrite table
      
      There is currently no support for per-port egress mapping of priority to PCP and
      priority to DSCP. Some support for expressing egress mapping of PCP is supported
      through ip link, with the 'egress-qos-map', however this command only maps
      priority to PCP, and for vlan interfaces only. DCB APP already has support for
      per-port ingress mapping of PCP/DEI, DSCP and a bunch of other stuff. So why not
      take advantage of this fact, and add a new table that does the reverse.
      
      This patch series introduces the new DCB rewrite table. Whereas the DCB
      APP table deals with ingress mapping of PID (protocol identifier) to priority,
      the rewrite table deals with egress mapping of priority to PID.
      
      It is indeed possible to integrate rewrite in the existing APP table, by
      introducing new dedicated rewrite selectors, and altering existing functions
      to treat rewrite entries specially. However, I feel like this is not a good
      solution, and will pollute the APP namespace. APP is well-defined in IEEE, and
      some userspace relies of advertised entries - for this fact, separating APP and
      rewrite into to completely separate objects, seems to me the best solution.
      
      The new table shares much functionality with the APP table, and as such, much
      existing code is reused, or slightly modified, to work for both.
      
      ================================================================================
      DCB rewrite table in a nutshell
      ================================================================================
      The table is implemented as a simple linked list, and uses the same lock as the
      APP table. New functions for getting, setting and deleting entries have been
      added, and these are exported, so they can be used by the stack or drivers.
      Additionnaly, new dcbnl_setrewr and dcnl_delrewr hooks has been added, to
      support hardware offload of the entries.
      
      ================================================================================
      Sparx5 per-port PCP rewrite support
      ================================================================================
      Sparx5 supports PCP egress mapping through two eight-entry switch tables.
      One table maps QoS class 0-7 to PCP for DE0 (DP levels mapped to
      drop-eligibility 0) and the other for DE1. DCB does currently not have support
      for expressing DP/color, so instead, the tagged DEI bit will reflect the DP
      levels, for any rewrite entries> 7 ('de').
      
      The driver will take apptrust (contributed earlier) into consideration, so
      that the mapping tables only be used, if PCP is trusted *and* the rewrite table
      has active mappings, otherwise classified PCP (same as frame PCP) will be used
      instead.
      
      ================================================================================
      Sparx5 per-port DSCP rewrite support
      ================================================================================
      Sparx5 support DSCP egress mapping through a single 32-entry table. This table
      maps classified QoS class and DP level to classified DSCP, and is consulted by
      the switch Analyzer Classifier at ingress. At egress, the frame DSCP can either
      be rewritten to classified DSCP to frame DSCP.
      
      The driver will take apptrust into consideration, so that the mapping tables
      only be used, if DSCP is trusted *and* the rewrite table has active mappings,
      otherwise frame DSCP will be used instead.
      
      ================================================================================
      Patches
      ================================================================================
      Patch #1 modifies dcb_app_add to work for both APP and rewrite
      
      Patch #2 adds dcbnl_app_table_setdel() for setting and deleting both APP and
               rewrite entries.
      
      Patch #3 adds the rewrite table and all required functions, offload hooks and
               bookkeeping for maintaining it.
      
      Patch #4 adds two new helper functions for getting a priority to PCP bitmask
               map, and a priority to DSCP bitmask map.
      
      Patch #5 adds support for PCP rewrite in the Sparx5 driver.
      Patch #6 adds support for DSCP rewrite in the Sparx5 driver.
      
      ================================================================================
      v2 -> v3:
        in dcbnl_ieee_fill() use nla_nest_start() instead of the _noflag() version.
        Also, cancel the rewrite nest in case of an error (Petr Machata).
      
      v1 -> v2:
        In dcb_setrewr() change proto to u16 as it ought to be, and remove zero
        initialization of err. (Dan Carpenter).
        Change name of dcbnl_apprewr_setdel -> dcbnl_app_table_setdel and change the
        function signature to take a single function pointer. Update uses accordingly
        (Petr Machata).
      
      ====================
      
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f5339209
    • Daniel Machon's avatar
      net: microchip: sparx5: add support for DSCP rewrite · 246c77f6
      Daniel Machon authored
      
      
      Add support for DSCP rewrite in Sparx5 driver. On egress DSCP is
      rewritten from either classified DSCP, or frame DSCP. Classified DSCP is
      determined by the Analyzer Classifier on ingress, and is mapped from
      classified QoS class and DP level. Classification of DSCP is by default
      enabled for all ports.
      
      It is required that DSCP is trusted for the egress port *and* rewrite
      table is not empty, in order to rewrite DSCP based on classified DSCP,
      otherwise DSCP is always rewritten from frame DSCP.
      
      classified_dscp = qos_dscp_map[8 * dp_level + qos_class];
      if (active_mappings && dscp_is_trusted)
      	rewritten_dscp = classified_dscp
      else
      	rewritten_dscp = frame_dscp
      
      To rewrite DSCP to 20 for any frames with priority 7:
      
      $ dcb apptrust set dev eth0 order dscp
      $ dcb rewr add dev eth0 7:20 <-- not in iproute2/dcb yet
      
      Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      246c77f6
    • Daniel Machon's avatar
      net: microchip: sparx5: add support for PCP rewrite · 2234879f
      Daniel Machon authored
      
      
      Add support for rewrite of PCP and DEI, based on classified Quality of
      Service (QoS) class and Drop-Precedence (DP) level.
      
      The DCB rewrite table is queried for mappings between priority and
      PCP/DEI. The classified DP level is then encoded in the DEI bit, if a
      mapping for DEI exists.
      
      Sparx5 has four DP levels, where by default, 0 is mapped to DE0 and 1-3
      are mapped to DE1. If a mapping exists where DEI=1, then all classified
      DP levels mapped to DE1 will set the DEI bit. The other way around for
      DEI=0. Effectively, this means that the tagged DEI bit will reflect the
      DP level for any mappings where DEI=1.
      
      Map priority=1 to PCP=1 and DEI=1:
      $ dcb rewr add dev eth0 pcp-prio 1:1de
      
      Map priority=7 to PCP=2 and DEI=0
      $ dcb rewr add dev eth0 pcp-prio 7:2nd
      
      Also, sparx5_dcb_ieee_dscp_setdel() has been refactored, to work for
      both APP and rewrite entries.
      
      Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      2234879f
    • Daniel Machon's avatar
      net: dcb: add helper functions to retrieve PCP and DSCP rewrite maps · 1df99338
      Daniel Machon authored
      
      
      Add two new helper functions to retrieve a mapping of priority to PCP
      and DSCP bitmasks, where each bitmap contains ones in positions that
      match a rewrite entry.
      
      dcb_ieee_getrewr_prio_dscp_mask_map() reuses the dcb_ieee_app_prio_map,
      as this struct is already used for a similar mapping in the app table.
      
      Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
      Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1df99338
    • Daniel Machon's avatar
      net: dcb: add new rewrite table · 622f1b2f
      Daniel Machon authored
      
      
      Add new rewrite table and all the required functions, offload hooks and
      bookkeeping for maintaining it. The rewrite table reuses the app struct,
      and the entire set of app selectors. As such, some bookeeping code can
      be shared between the rewrite- and the APP table.
      
      New functions for getting, setting and deleting entries has been added.
      Apart from operating on the rewrite list, these functions do not emit a
      DCB_APP_EVENT when the list os modified. The new dcb_getrewr does a
      lookup based on selector and priority and returns the protocol, so that
      mappings from priority to protocol, for a given selector and ifindex is
      obtained.
      
      Also, a new nested attribute has been added, that encapsulates one or
      more app structs. This attribute is used to distinguish the two tables.
      
      The dcb_lock used for the APP table is reused for the rewrite table.
      
      Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
      Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      622f1b2f
    • Daniel Machon's avatar
      net: dcb: add new common function for set/del of app/rewr entries · 30568334
      Daniel Machon authored
      
      
      In preparation for DCB rewrite. Add a new function for setting and
      deleting both app and rewrite entries. Moving this into a separate
      function reduces duplicate code, as both type of entries requires the
      same set of checks. The function will now iterate through a configurable
      nested attribute (app or rewrite attr), validate each attribute and call
      the appropriate set- or delete function.
      
      Note that this function always checks for nla_len(attr_itr) <
      sizeof(struct dcb_app), which was only done in dcbnl_ieee_set and not in
      dcbnl_ieee_del prior to this patch. This means, that any userspace tool
      that used to shove in data < sizeof(struct dcb_app) would now receive
      -ERANGE.
      
      Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
      Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      30568334
    • Daniel Machon's avatar
      net: dcb: modify dcb_app_add to take list_head ptr as parameter · 34b7074d
      Daniel Machon authored
      
      
      In preparation to DCB rewrite. Modify dcb_app_add to take new struct
      list_head * as parameter, to make the used list configurable. This is
      done to allow reusing the function for adding rewrite entries to the
      rewrite table, which is introduced in a later patch.
      
      Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
      Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      34b7074d
    • Andrew Halaney's avatar
      net: stmmac: enable all safety features by default · fdfc76a1
      Andrew Halaney authored
      
      
      In the original implementation of dwmac5
      commit 8bf993a5 ("net: stmmac: Add support for DWMAC5 and implement Safety Features")
      all safety features were enabled by default.
      
      Later it seems some implementations didn't have support for all the
      features, so in
      commit 5ac712dc ("net: stmmac: enable platform specific safety features")
      the safety_feat_cfg structure was added to the callback and defined for
      some platforms to selectively enable these safety features.
      
      The problem is that only certain platforms were given that software
      support. If the automotive safety package bit is set in the hardware
      features register the safety feature callback is called for the platform,
      and for platforms that didn't get a safety_feat_cfg defined this results
      in the following NULL pointer dereference:
      
      [    7.933303] Call trace:
      [    7.935812]  dwmac5_safety_feat_config+0x20/0x170 [stmmac]
      [    7.941455]  __stmmac_open+0x16c/0x474 [stmmac]
      [    7.946117]  stmmac_open+0x38/0x70 [stmmac]
      [    7.950414]  __dev_open+0x100/0x1dc
      [    7.954006]  __dev_change_flags+0x18c/0x204
      [    7.958297]  dev_change_flags+0x24/0x6c
      [    7.962237]  do_setlink+0x2b8/0xfa4
      [    7.965827]  __rtnl_newlink+0x4ec/0x840
      [    7.969766]  rtnl_newlink+0x50/0x80
      [    7.973353]  rtnetlink_rcv_msg+0x12c/0x374
      [    7.977557]  netlink_rcv_skb+0x5c/0x130
      [    7.981500]  rtnetlink_rcv+0x18/0x2c
      [    7.985172]  netlink_unicast+0x2e8/0x340
      [    7.989197]  netlink_sendmsg+0x1a8/0x420
      [    7.993222]  ____sys_sendmsg+0x218/0x280
      [    7.997249]  ___sys_sendmsg+0xac/0x100
      [    8.001103]  __sys_sendmsg+0x84/0xe0
      [    8.004776]  __arm64_sys_sendmsg+0x24/0x30
      [    8.008983]  invoke_syscall+0x48/0x114
      [    8.012840]  el0_svc_common.constprop.0+0xcc/0xec
      [    8.017665]  do_el0_svc+0x38/0xb0
      [    8.021071]  el0_svc+0x2c/0x84
      [    8.024212]  el0t_64_sync_handler+0xf4/0x120
      [    8.028598]  el0t_64_sync+0x190/0x194
      
      Go back to the original behavior, if the automotive safety package
      is found to be supported in hardware enable all the features unless
      safety_feat_cfg is passed in saying this particular platform only
      supports a subset of the features.
      
      Fixes: 5ac712dc ("net: stmmac: enable platform specific safety features")
      Reported-by: default avatarNing Cai <ncai@quicinc.com>
      Signed-off-by: default avatarAndrew Halaney <ahalaney@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      fdfc76a1
    • David S. Miller's avatar
      Merge branch 'octeontx2-af-CPT' · b4fbf0b2
      David S. Miller authored
      
      
      Srujana Challa says:
      
      ====================
      octeontx2-af: Miscellaneous changes for CPT
      
      This patchset consists of miscellaneous changes for CPT.
      - Adds a new mailbox to reset the requested CPT LF.
      - Modify FLR sequence as per HW team suggested.
      - Adds support to recover CPT engines when they gets fault.
      - Updates CPT inbound inline IPsec configuration mailbox,
        as per new generation of the OcteonTX2 chips.
      - Adds a new mailbox to return CPT FLT Interrupt info.
      
      ---
      v2:
      - Addressed a review comment.
      v1:
      - Dropped patch "octeontx2-af: Fix interrupt name strings completely"
        to submit to net.
      ---
      ====================
      
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b4fbf0b2
    • Srujana Challa's avatar
      octeontx2-af: add mbox to return CPT_AF_FLT_INT info · 8299ffe3
      Srujana Challa authored
      
      
      CPT HW would trigger the CPT AF FLT interrupt when CPT engines
      hits some uncorrectable errors and AF is the one which receives
      the interrupt and recovers the engines.
      This patch adds a mailbox for CPT VFs to request for CPT faulted
      and recovered engines info.
      
      Signed-off-by: default avatarSrujana Challa <schalla@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8299ffe3
    • Srujana Challa's avatar
      octeontx2-af: update cpt lf alloc mailbox · c0688ec0
      Srujana Challa authored
      
      
      The CN10K CPT coprocessor contains a context processor
      to accelerate updates to the IPsec security association
      contexts. The context processor contains a context cache.
      This patch updates CPT LF ALLOC mailbox to config ctx_ilen
      requested by VFs. CPT_LF_ALLOC:ctx_ilen is the size of
      initial context fetch.
      
      Signed-off-by: default avatarSrujana Challa <schalla@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c0688ec0
    • Nithin Dabilpuram's avatar
      octeontx2-af: restore rxc conf after teardown sequence · d5b2e0a2
      Nithin Dabilpuram authored
      
      
      CN10K CPT coprocessor includes a component named RXC which
      is responsible for reassembly of inner IP packets. RXC has
      the feature to evict oldest entries based on age/threshold.
      The age/threshold is being set to minimum values to evict
      all entries at the time of teardown.
      This patch adds code to restore timeout and threshold config
      after teardown sequence is complete as it is global config.
      
      Signed-off-by: default avatarNithin Dabilpuram <ndabilpuram@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d5b2e0a2
    • Srujana Challa's avatar
      octeontx2-af: optimize cpt pf identification · 9adb04ff
      Srujana Challa authored
      
      
      Optimize CPT PF identification in mbox handling for faster
      mbox response by doing it at AF driver probe instead of
      every mbox message.
      
      Signed-off-by: default avatarSrujana Challa <schalla@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      9adb04ff
    • Srujana Challa's avatar
      octeontx2-af: modify FLR sequence for CPT · 1286c50a
      Srujana Challa authored
      
      
      On OcteonTX2 platform CPT instruction enqueue is only
      possible via LMTST operations.
      The existing FLR sequence mentioned in HRM requires
      a dummy LMTST to CPT but LMTST can't be submitted from
      AF driver. So, HW team provided a new sequence to avoid
      dummy LMTST. This patch adds code for the same.
      
      Signed-off-by: default avatarSrujana Challa <schalla@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1286c50a
    • Srujana Challa's avatar
      octeontx2-af: add mbox for CPT LF reset · f58cf765
      Srujana Challa authored
      
      
      On OcteonTX2 SoC, the admin function (AF) is the only one with all
      priviliges to configure HW and alloc resources, PFs and it's VFs
      have to request AF via mailbox for all their needs.
      This patch adds a new mailbox for CPT VFs to request for CPT LF
      reset.
      
      Signed-off-by: default avatarSrujana Challa <schalla@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f58cf765
    • Srujana Challa's avatar
      octeontx2-af: recover CPT engine when it gets fault · 07ea567d
      Srujana Challa authored
      
      
      When CPT engine has uncorrectable errors, it will get halted and
      must be disabled and re-enabled. This patch adds code for the same.
      
      Signed-off-by: default avatarSrujana Challa <schalla@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      07ea567d
    • David S. Miller's avatar
      Merge branch 'lan9303-phylink' · 147c50ac
      David S. Miller authored
      
      
      Jerry Ray says:
      
      ====================
      dsa: lan9303: Move to PHYLINK
      
      This patch series moves the lan9303 driver to use the phylink
      api away from phylib.
      
      Migrating to phylink means removing the .adjust_link api. The
      functionality from the adjust_link is moved to the phylink_mac_link_up
      api.  The code being removed only affected the cpu port.  The other
      ports on the LAN9303 do not need anything from the phylink_mac_link_up
      api.
      
      Patches:
       0001 - Whitespace only change aligning the dsa_switch_ops members.
      	No code changes.
       0002 - Moves the Turbo bit initialization out of the adjust_link api and
      	places it in a driver initialization execution path. It only needs
      	to be initialized once, it is never changed, and it is not a
      	per-port flag.
       0003 - Adds exception handling logic in the extremely unlikely event that
      	the read of the device fails.
       0004 - Performance optimization that skips a slow register write if there
      	is no need to perform it.
       0005 - Change the way we identify the xMII port as phydev will be NULL
      	when this logic is moved into phylink_mac_link_up.
       0006 - Removes adjust_link and begins using the phylink dsa_switch_ops
      	apis.
       0007 - Adds XMII port flow control settings in the phylink_mac_link_up()
      	api while cleaning up the ANEG / speed / duplex implementation.
      ---
      v6->v7:
        - Moved the initialization of the Turbo bit into lan9303_setup().
        - Added a macro for determining is a port is an XMII port.
        - Added setting the XMII flow control in the phylink_mac_link_up() API.
        - removed unnecessary error handling and cleaned up the code flow in
          phylink_mac_link_up().
      v5->v6:
        - Moved to using port number to identify xMII port for the LAN9303.
      v4->v5:
        - Created prep patches to better show how things migrate.
        - cleaned up comments.
      v3->v4:
        - Addressed whitespace issues as a separate patch.
        - Removed port_max_mtu api patch as it is unrelated to phylink migration.
        - Reworked the implementation to preserve the adjust_link functionality
          by including it in the phylink_mac_link_up api.
      v2->v3:
        Added back in disabling Turbo Mode on the CPU MII interface.
        Removed the unnecessary clearing of the phy supported interfaces.
      v1->v2:
        corrected the reported mtu size, removing ETH_HLEN and ETH_FCS_LEN
      ====================
      
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      147c50ac
    • Jerry Ray's avatar
      dsa: lan9303: Add flow ctrl in link_up · 87523986
      Jerry Ray authored
      
      
      While the prior patch moved the adjust_link code into the
      phylink_mac_link_up api, this patch cleans it up and adds the setting the
      port's flow control based on the phylink_mac_link_up input parameters.
      
      Signed-off-by: default avatarJerry Ray <jerry.ray@microchip.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      87523986
    • Jerry Ray's avatar
      dsa: lan9303: Migrate to PHYLINK · 332bc552
      Jerry Ray authored
      
      
      This patch replaces the adjust_link api with the phylink apis that provide
      equivalent functionality.
      
      The remaining functionality from the adjust_link is now covered in the
      phylink_mac_link_up api.
      
      Removes:
      .adjust_link
      Adds:
      .phylink_get_caps
      .phylink_mac_link_up
      
      Signed-off-by: default avatarJerry Ray <jerry.ray@microchip.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      332bc552