Pull "Second batch of AT91 DT patches for 3.18" from Nicolas Ferre:

- 2 little fixes for at91sam9x5 and at91sam9n12ek
- removal of a board specific hook for sama5d3xek about phy fixup
  replaced with proper DT property definition.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'at91-dt2' of git://github.com/at91linux/linux-at91:
  ARM: at91: remove phy fixup for sama5d3xek boards
  ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards
  ARM: at91/dt: sam9n12ek: ohci: add port and vbus property
  ARM: at91/dt: sam9x5: fix ADC compatible string

Merge "First batch of AT91 DT material for 3.18" from Nicolas Ferre:

- RAM controller rework for multiple controller SoCs
- shutdown controller addtion

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
  ARM: at91/dt: sama5d3: Add shutdown controller
  ARM: at91/dt: Declare a second ram controller when relevant
  ARM: at91/dt: at91sam9: use ddrck in ramc
  ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks

Merge tag 'renesas-dt3-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

 into next/dt

Merge "Third Round of Renesas ARM Based SoC DT Updates for v3.18" from Simon Horman:

* Use tabs for indentation in kzm9g-reference and r8a7779 DTS(I) files
* Add platform device tree bindings documentation
* Add SoC-specific thermal compatible property to r8a73a4 and r8a7779

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'renesas-dt3-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: kzm9g-reference dts: Use tabs for indentation
  ARM: shmobile: r8a7779 dtsi: Use tabs for indentation
  ARM: shmobile: Add platform device tree bindings documentation
  ARM: shmobile: r8a73a4 dtsi: Add SoC-specific thermal compatible property
  ARM: shmobile: r8a7779 dtsi: Add SoC-specific thermal compatible property

Merge tag 'renesas-dt2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

 into next/dt

Merge "Second Round Of Renesas ARM Based SoC DT Updates For v3.18" from Simon Horman:

* Tidy up interrupt-parents
* Add clocks register defines for r8a7740 SoC
* Add JPU clock to r8a7791 and r8a7790 SoCs

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'renesas-dt2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: sh73a0 dtsi: Move interrupt-parent to the top
  ARM: shmobile: r8a7791 dtsi: Remove superfluous interrupt-parent
  ARM: shmobile: r8a7790 dtsi: Remove superfluous interrupt-parent
  ARM: shmobile: r8a7779 dtsi: Remove superfluous interrupt-parent
  ARM: shmobile: r8a7740: clock register bits
  ARM: shmobile: r8a7791: Add JPU clock dt and CPG define.
  ARM: shmobile: r8a7790: Add JPU clock dt and CPG define.

Merge tag 'renesas-dt-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

 into next/dt

Merge "Renesas ARM Based SoC DT Updates for v3.18" from Simon Horman:

* Add VIN support to lager/r8a7790, koelsch/r8a7791 and henninger/r8a7791
* Enable DMA for MSIOF and QSPI on r8a7790 and r8a7791

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

* tag 'renesas-dt-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: lager: add VIN1/ADV7180 device nodes
  ARM: shmobile: r8a7790: add VIN device nodes
  ARM: shmobile: r8a7790 dtsi: Enable DMA for MSIOF
  ARM: shmobile: r8a7790 dtsi: Enable DMA for QSPI
  ARM: shmobile: r8a7791 dtsi: Enable DMA for MSIOF
  ARM: shmobile: r8a7791 dtsi: Enable DMA for QSPI
  ARM: shmobile: r8a7791: Add DMAC devices to DT
  ARM: shmobile: r8a7790: Add DMAC devices to DT
  ARM: shmobile: r8a7790: Add DMAC clocks to DT
  ARM: shmobile: koelsch: add VIN1/ADV7180 DT support
  ARM: shmobile: henninger: add VIN0/ADV7180 DT support
  ARM: shmobile: r8a7791: add VIN DT support

Merge tag 'v3.18-rockchip-dma' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "rockchip dma support" from Heiko Stuebner:

Enable the AMBA bus and add necessary dma-controller dts nodes

* tag 'v3.18-rockchip-dma' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: add rk3066 and rk3188 dma controllers
  ARM: dts: rockchip: add rk3288 dma controllers
  ARM: rockchip: enable the AMBA bus

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'v3.18-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "First hunk of Rockchip dts changes for 3.18" from Heiko Stuebner:

- dw_mmc conversion from Jaehoon Chung
- mmc support for rk3288
- pwm + backlight for rk3288
- rtc for Radxa Rock
- saradc base nodes

* tag 'v3.18-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: add saradc nodes
  ARM: dts: rockchip: add hym8563 rtc to Radxa Rock board
  ARM: dts: Enable PWM backlight on rk3288-evb
  ARM: dts: Add main PWM info to rk3288
  ARM: dts: Move the PMIC interrupt pinctrl line to rk3288-evb common
  ARM: dts: Enable emmc and sdmmc on the rk3288-evb boards
  ARM: dts: Add emmc and sdmmc to the rk3288 device tree
  ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Add both the cpu and peripheral pl330 dma controllers present in rk3188 socs.
The first dma controller can change between secure and non-secure mode. Both
instances are added but the non-secure variant is left disabled by default,
as on the majority of boards the bootloader leaves it in secure mode.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Add both the bus and peripheral pl330 dma controllers present in rk3288 socs.
The first dma controller can change between secure and non-secure mode. Both
instances are added but the non-secure variant is left disabled by default,
as on the majority of boards the bootloader leaves it in secure mode.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

This is needed to access the pl330 dma controllers on Rockchip SoCs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>

Checkpatch says:

ERROR: code indent should use tabs where possible

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Checkpatch says:

ERROR: code indent should use tabs where possible

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

These board specific delays are now configured through micrel's specific
DT bindings (see Documentation/devicetree/bindings/net/micrel-ksz9021.txt).

Remove this phy fixup registration from sama5 DT machine file to keep it
as generic as possible.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25)
and board specific timing configs.

Atmel has two different HW designs for its CPU modules: the first one
(produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors
and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up
resistor and PHYAD[1-2] to pull down resistors.
As a result, Ronetix design will have its PHY available at address 0x1 and
Embest design at 0x7.
By defining both phys we're letting the phy core detect the one actually
available on the MDIO bus.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Add the port number and vbus property for ohci port, or else if
bootloader won't configure the vbus pin, the 5v supply is not
power on, so can not work with usb devices.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Use the correct compatible string for the ADC of the at91sam9x5 family of SoCs.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Add Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
Documentation, listing supported SoCs and boards.

This allows to use checkpatch to validate DTSes referring to Renesas
shmobile SoCs, and boards containing those SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms+renesas@verge.net.au: tweaked title]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The thermal node used the generic compatible property only.
Add the SoC-specific one, to make it future proof.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The thermal node used the generic compatible property only.
Add the SoC-specific one, to make it future proof.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add the core device nodes for the SARADC found on both the Cortex-A9 series
(rk3066 and rk3188) as well as the newer rk3288.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The Radxa Rock uses a hym8563 as rtc. Add the i2c device and necessary
pinconfig for the interrupt pin - labeled rtc_int in the schematics.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

PWM0 is the PWM associated with the LCD backlight.  Enable it.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

This adds the PWM info (other than the VOP PWM) to the main rk3288
dtsi file.

Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Add an "interrupt-parent = <&gic>;" at the top, which is inherited by
all child nodes, so the "interrupt-parent" properties can be removed
from the individual child nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

There's already an "interrupt-parent = <&gic>;" at the top, which is
inherited by all child nodes, so the "interrupt-parent" property in
the sound node can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

There's already an "interrupt-parent = <&gic>;" at the top, which is
inherited by all child nodes, so the "interrupt-parent" property in
the sound node can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

There's already an "interrupt-parent = <&gic>;" at the top, which is
inherited by all child nodes, so the "interrupt-parent" properties in
the serial nodes can be removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Contains the header file with the clock pulse generator and MSTP bits.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Pull AT91 ramc and reset/poweroff related DT patches from Maxim Ripard:
 "This branch gathers a few devicetree patches needed for the reworks found in
  the later patches to be sent. More precisely, it holds:
    - The addition of ddrck for the sama5d3 and the sam9 SoCs
    - The addition of the shutdown controller node in the sama5d3 DTSI
    - The slight rework of the ramc bindings for the SoCs that have several RAM
      controllers"

Conflicts:
	arch/arm/boot/dts/at91sam9g45.dtsi

Add the Lager board specific device node part for VIN1 (composite video in);
add the device node for Analog Devices ADV7180 video decoder to IIC2 bus.
Add the necessary subnodes to interconnect VIN1 and ADV7180 devices.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[Sergei: rebased, edited changelog and summary]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add device nodes for the four video input controllers on the R8A7790.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[Sergei: renamed VIN device nodes, edited changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add register sets used for access by the DMA engine, and DMA properties to
the MSIOF nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a DMA property to the QSPI node

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add register sets used for access by the DMA engine, and DMA properties to
the MSIOF nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a DMA property to the QSPI node

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Instantiate the two system DMA controllers in the r8a7791 device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Instantiate the two system DMA controllers in the r8a7790 device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add the SYS-DMAC0 and SYS-DMAC1 clocks to the MSTP2 clock node. They
will be used by the upcoming DMAC DT nodes.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>