The mmc module clocks are A80 specific module 0 (storage) type clocks.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Alexander Bersenev <bay@hackerdom.ru>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Olliver Schinagl <oliver@schinagl.nl>

The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.

In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Alexander Bersenev <bay@hackerdom.ru>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Roman Byshko <rbyshko@gmail.com>

The Ippo Q8H v1.2 is almost identical to the v5, still it needs a separate
dtb file since some gpio-s surrounding the wlan/bluetooth are different,
it uses different camera sensors, and different DRAM timings.

Note that atm neither the wlan/bluetooth nor the camera are supported, so
atm their is no difference between the dts files, but because of the different
DRAM timings there are already separate u-boot configs for the 2 different
versions, and the 1.2 config refers to sun8i-a23-ippo-q8h-v1.2.dtb to be
future proof, so we need to provide a sun8i-a23-ippo-q8h-v1.2.dtb file.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The a23-ippo-q8h tablets have volume up/down buttons using the lradc. This
has been tested on both a v5 and a v1.2 tablet.

Tested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The A23 has the same lradc controller as previous Allwinner SoCs.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.

The regulator names and constraints are based on the board
schematics and the SoC datasheet.

DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.

Also get rid of axp209 properties already set in axp209.dtsi.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.

The regulator names and constraints are based on the board
schematics and the SoC datasheet.

DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.

LDO3 powers the USB WiFi module. This patch also references it
from the usb-phy node.

Also get rid of axp209 properties already set in axp209.dtsi.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.

The regulator names and constraints are based on the board
schematics and the SoC datasheet.

DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.

Also get rid of axp209 properties already set in axp209.dtsi.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.

The regulator names and constraints are based on the board
schematics and the SoC datasheet.

DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.

Also get rid of axp209 properties already set in axp209.dtsi.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The AXP209 PMIC is used with some Allwinner SoCs. This patch adds
a dtsi file listing all the regulator nodes. The regulators are
initialized based on their device node names.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The pcDuino board has LEDs connected to PH15/PH16, and back/home/menu
buttons to PH17/18/19 respectively. Enable these via gpio-leds and
gpio-keys. This is shared across the v1 and v2 versions of the board.

Tested on a v2 and verified against the schematics of a v1.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Acked-by: Hans de Goede <hdegoede@redhat.com>
[Maxime: Added some newlines between the button nodes]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0"
display pipelines for when u-boot has set up a pipeline to drive a LCD panel /
VGA output rather then the HDMI output.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.

The operating points were taken from the A10 FEX files in the
sunxi-boards repository. All FEX files have the same settings.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.

The operating points were taken from the A13 FEX files in the
sunxi-boards repository. All FEX files have the same settings.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.

The operating points were taken from the A20 FEX files in the
sunxi-boards repository. Not all boards have the same settings. The
settings in this patch are the most generic ones.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Now that the resistive touchpanel driver supports thermal sensors,
add the "#thermal-sensor-cells" property as required by the thermal
framework.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The NMI IRQ controller uses the standard flags definition for the IRQ level and
edges.

Use the common header to use defines instead of opaque numbers.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The GIC requires some extra opaque arguments to set the IRQ type and flags.

Convert the DTs to using the common defines.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The pinctrl nodes require some extra opaque arguments for the pull up and drive
strength values.

Introduce a new header file and convert the device trees to replace these
opaque numbers by defines.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The DMA engine for the A10/A20 and derivatives require an opaque extra
argument.

Add a dt-bindings header, and convert the device trees to it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Replace the various raw GPIO flags by their definition in the common
dt-bindings header.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Prepare the device trees to use the C preprocessor.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND,
rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG
controller), ethernet, 3.5 mm jack with a/v out and hdmi out.

Note it has no sdcard slot and therefore can only be fel booted.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Add a dtsi file for A31s based boards.

Since the  A31s is the same die as the A31 in a different package, this dtsi
simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to
reflect the different package, everything else is identical.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The Mele M9 has an ir receiver, enable it.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Add a node for the ir receiver found on the A31.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[Maxime: Added a node label]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Add an ir_clk sub-node to the prcm node.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Only SPI0 is enabled, as the schematic denotes it as the only SPI bus,
while other pins are reserved for different peripherals.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

These are based on the available SPI configurations of Cubieboard,
Olimex LIME, and PcDuino. There is no pin group for SPI3, as all the
boards seem to use those pins for EMAC.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

On the Hummingbird A31 board, the RTL8211E ethernet phy has its reset
line connect to a gpio pin, instead of floating like on other boards.
Add the stmmac properties for describing the reset gpio.

The reset delays were taken from the RTL8211E datasheet.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Add pinmux settings for the ir receive pin of the A31.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Testing has shown that on sun4i the display backend engine does not have
deep enough fifo-s causing flickering / tearing in full-hd mode due to
fifo underruns. This can be avoided by letting the display frontend engine
do the dma from memory, and then letting it feed the data directly into
the backend unmodified, as the frontend does have deep enough fifo-s.

Note since u-boot-v2015.01 has been released using the de_be0-lcd0-hdmi
pipeline on sun4i, we need to keep that one around too (unfortunately).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The Ippo q8h has its serial console connected to the r-uart. Adjust the
serial0 alias to match.

This fixes the kernel serial console no longer working since 3.19-rc1, because
8250_dw.c now honors dt aliases, causing the serial console to be ttyS5 rather
then being ttyS0, as it was in 3.18 and before.

Note that adjusting bootargs instead is not an acceptable fix, because
console=ttyS0,115200 is used by a lot of bootscripts, etc. and this should
continue to work.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>