- Sep 16, 2014
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Alexander Shiyan authored
This patch adds support for the Freescale (Motorola) i.MX1 ADS board. This change is intended to further remove non-DT support for this board. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Stefan Agner authored
Add USB support for Freescale Vybrid tower. The USB hosts over-current protection signal is not connected to the PHY's over- current protection, hence we need to disable it. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Stefan Agner authored
Add USB support for Colibri VF61 modules. The Colibri standard pinout defines a pin for USB over-current. However, due to lack of pinmux options, the USB hosts over-current protection signal of the Colibri standard could not be connected to the PHY's over-current protection. Hence we need to disable the over-current functionality of the USB controller. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Stefan Agner authored
Add device tree node for usbmisc which controls the non-core USB registers. This is required to use the property to disable the over- current detection. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Stefan Agner authored
This adds USB PHY and USB controller nodes. Vybrid SoCs have two independent USB cores which each supports DR (dual role). However, real OTG is not supported since the OTG ID pin is not available. The PHYs are located within the anadig register range, hence we need to change the length of the anadig registers. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Uwe Kleine-König authored
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Marc Kleine-Budde authored
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> [ukl: rebase from ancient kernel version] Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Michael Grzeschik authored
This patch adds pin configurations for: - csi aud6 - cspi1 uart3 - csi uart5 - cc - csi sdhc2 - csi cspi3 - sd1 cspi2 - cspi1 pwm Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Markus Pargmann authored
The preloaded script addresses on imx25 and imx35 are different, so imx25 is not compatible with imx35-sdma unless a custom firmware is loaded. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Bill Pringlemeir authored
The ttyLP1 is already the default console/serial port. The tower board will route ttyLP2 to the same connectors depending on the JP23/24 settings. See: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/276457.html http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/275576.html Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Anson Huang authored
Add thermal sensor support for i.MX6SL. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch adds basic devicetree template for i.MX1 based SoCs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Philipp Zabel authored
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Michael Olbrich authored
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Michael Olbrich authored
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Lucas Stach authored
Everything in the PCI specification assumes devices to be enumerable on startup. This is only possible if they have power available. A future improvement may allow this regulator to be switched off for D3hot and D3cold power states, but there is a lot of work to do the pcie host controller side for this to work. To keep things simple always enable the regulator for now. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Stefan Agner authored
The Colibri VF61 is a module which needs a carrier board to actually run. Different carrier board have different hardware support, hence we should reflect this in the device tree files. This patch adds the Colibri Evaluation Board, which supports almost all peripherals defined in the Colibri standard. Also align the compatible naming, file splitting and file naming with the scheme which was choosen for the Tegra based modules. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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- Sep 01, 2014
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Xiubo Li authored
This was added by: Commit 8128c4f3 ("ARM: dts: vf610-twr: Add simple-card support.") This useless property may cause some confusions for users. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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- Aug 29, 2014
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Steve Twiss authored
This patch series updates the device tree vendor prefix for Dialog Semiconductor. Various methods are currently used throughout the kernel: 'diasemi', 'dialog' and 'dlg'. Others have also been suggested. This patch set aims to consolidate the usage of the vendor prefix to use a common standard. The prefix 'dlg' is used. Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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- Aug 28, 2014
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Tony Lindgren authored
Commit 43fef47f (mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle) added support for configuring the PMIC to cut off resources during deeper idle states to save power. This however caused regression for n900 display power that needed the PMIC configuration to be disabled with commit d937678a (ARM: dts: Revert enabling of twl configuration for n900). Turns out the root cause of the problem is that we must use TWL4030_RESCONFIG_UNDEF instead of DEV_GRP_NULL to avoid disabling regulators that may have been enabled before the init function for twl4030-power.c runs. With TWL4030_RESCONFIG_UNDEF we let the regulator framework control the regulators like it should. Here we need to only configure the sys_clken and sys_off_mode triggers for the regulators that cannot be done by the regulator framework as it's not running at that point. This allows us to enable the PMIC configuration for n900. Fixes: 43fef47f (mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle) Cc: stable@vger.kernel.org # v3.16 Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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- Aug 27, 2014
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Rabeeh Khoury authored
This patch is important for the MicroSOM implementation due to the following details - 1. VIH of the Atheros phy is 1.7V. 2. NVCC_ENET which is the power domain of the MDIO pad is driven by the PHY's LDO (i.e. either 1.8v or 2.5v). 3. The MicroSOM implements an onbouard 1.6kohm pull up to 3.3v (R3000). In the case the PHY's LDO was 1.8v then there would be only a 100mV margin for the signal to be acknowledged as high (1.8v-1.7v). Due to that setting the pad as an open drain will let the 1.6kohm pull that signal high to 3.3 that assures enough margins to the PHY to be acked as '1' logic. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Tero Kristo authored
Similarly to DRA7, OMAP5 has l3 and l4 clock rates incorrectly calculated. Fixed by using proper divider clock types for the clock nodes. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- Aug 26, 2014
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Tony Lindgren authored
For device tree based booting, we need to use wake-up interrupts like we already do for some omaps. This fixes a PM regression on beagleboard compared to legacy booting. Tested-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mark Brown authored
The kernel has never supported clk32g as a regulator since it is a clock and not a regulator. Fortunately nothing actually references this node so we can just remove it. Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored
GPIO modules are also interrupt sources. However, they require both the GPIO number and IRQ type to function properly. By declaring that GPIO uses interrupt-cells=<1>, we essentially do not allow users of the nodes to use the interrupt property appropritely. With this change, the following now works: interrupt-parent = <&gpio6>; interrupts = <5 IRQ_TYPE_LEVEL_LOW>; Fixes: 6e58b8f1 ('ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board') Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
For v3.14 and prior, 1-bit Hamming code ECC via software was used for NAND on this board. Commit c06c5270 in v3.15 changed the behaviour to use 1-bit Hamming code via Hardware using a different ECC layout i.e. (ROM code layout) than what is used by software ECC. This ECC layout change causes NAND filesystems created in v3.14 and prior to be unusable in v3.15 and later. So revert back to using software ECC scheme. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- Aug 25, 2014
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Russell King authored
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Russell King authored
Hummingboard has no over current hardware, so disable the over current detection for both ports. Cubox-i has over current hardware, so appropriately configure this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Geert Uytterhoeven authored
On r8a7791, i2c6 (aka iic3) doesn't need pinmux, but the koelsch dts refers to non-existent pinmux configuration data: pinmux core: sh-pfc does not support function i2c6 sh-pfc e6060000.pfc: invalid function i2c6 in map table Remove it to fix this. Fixes: commit 1d41f36a ("ARM: shmobile: koelsch dts: Add VDD MPU regulator for DVFS") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Olof Johansson <olof@lixom.net>
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Marcel Ziswiler authored
Working on Gigabit/PCIe support in U-Boot for Apalis T30 I realised that the current device tree source includes for our modules only happen to work due to referencing the on-carrier 5v0 supply from USB which is not at all available on-module. The modules actually contain TPS60150 charge pumps to generate the PMIC required 5 volts from the one and only 3.3 volt module supply. This patch fixes this. (Note: When back-porting this to v3.16 stable releases, simply drop the change to tegra30-apalis.dtsi; that file was added in v3.17) Cc: <stable@vger.kernel.org> #v3.16+ Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Aug 23, 2014
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Heiko Stuebner authored
During the restructuring of the Rockchip Cortex-A9 dtsi files it seems like the pinctrl settings vanished at some point from the mmc0 support. This of course renders them unusable, so readd the necessary pinctrl properties. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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- Aug 20, 2014
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Daniel Drake authored
Increase max i2c bus frequency beyond the default for faster data transfers. According to the manual, these faster speeds are only available when the board is wired up the right way. In this case, the vendor kernel has run at this speed for a long time. sda-delay is needed for talking to RTC on PMIC, otherwise the i2c controller never sees an ACK. Strangely the other PMIC i2c slave (the main one) works fine even without this delay. I Chose value 100 to match the vendor kernel. Signed-off-by: Daniel Drake <drake@endlessm.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Daniel Drake authored
The ODROID kernel shows that the PMIC interrupt line is hooked up to pin GPX3-2. This is needed for the max77686-irq driver to create the PMIC IRQ domain, which is needed by max77686-rtc. Signed-off-by: Daniel Drake <drake@endlessm.com> Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Aug 19, 2014
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Fabio Estevam authored
The following error is seen after a suspend/resume cycle on a mx53qsb with a MC34708 PMIC: root@freescale /$ echo mem > /sys/power/state [ 32.630592] PM: Syncing filesystems ... done. [ 32.643924] Freezing user space processes ... (elapsed 0.001 seconds) done. [ 32.652384] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. [ 32.679156] PM: suspend of devices complete after 13.113 msecs [ 32.685128] PM: suspend devices took 0.030 seconds [ 32.696109] PM: late suspend of devices complete after 6.133 msecs [ 33.313032] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 33.322009] PM: noirq suspend of devices complete after 619.667 msecs [ 33.328544] Disabling non-boot CPUs ... [ 33.335031] PM: noirq resume of devices complete after 2.352 msecs [ 33.842940] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 33.976095] [sched_delayed] sched: RT throttling activated [ 33.984804] PM: early resume of devices complete after 642.642 msecs [ 34.352954] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 34.862910] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 34.996595] PM: resume of devices complete after 1005.367 msecs [ 35.372925] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 35.882911] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 35.955707] PM: resume devices took 1.970 seconds [ 35.960445] Restarting tasks ... done. [ 35.993386] fec 63fec000.ethernet eth0: Link is Down [ 36.392980] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 36.902908] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 36.953036] ata1: SATA link down (SStatus 0 SControl 300) [ 37.412922] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 37.922906] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 37.993379] fec 63fec000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx [ 38.432938] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 38.942920] mc13xxx 0-0008: Failed to read IRQ status: -110 [ 39.452933] mc13xxx 0-0008: Failed to read IRQ status: -110 (flood of this error message continues forever) Commit 5169df8b ("ARM: dts: i.MX53: add support for MCIMX53-START-R") missed to configure the IOMUX for the PMIC IRQ pin. Configure the PMIC IRQ pin so that the suspend/resume sequence behaves cleanly as expected. Cc: <stable@vger.kernel.org> # 3.16 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Fugang Duan authored
The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B' IP port. Since uart IP port 'CTS_B' is output, and it don't need to set 'SELECT_INPUT' bit. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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- Aug 18, 2014
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Lothar Waßmann authored
The VPU on i.MX53 has two distinct clocks for register access and internal function. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Fixes: fbf970f6 ("ARM: dts: mx53qsb: Enable VPU support") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Silvio Fricke authored
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Bill Pringlemeir authored
Previous version had an extra 'fsl' which made the pins not match any entry. The console message, vf610-pinctrl 40048000.iomuxc: no fsl,pins property in node \ /soc/aips-bus@40000000/iomuxc@40048000/vf610-twr/esdhc1grp is displayed without the fix. The prior version would generally work as u-boot sets the pins properly for sdhc. This change allows Linux sdhc use even if u-boot is built without sdhc support. Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Acked-by: Stefan Agner <stefan@agner.ch> Fixes: 0517fe6a ("ARM: dts: vf610-twr: Add support for sdhc1") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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- Aug 09, 2014
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Stephen Rothwell authored
This was caused by commit 5a8da524 ("ARM: dts: exynos5420: add dsi node"), which conflicted with d51cad7d ("ARM: dts: remove display power domain for exynos5420"). The DTS addition should never have been merged through the DRM tree in the first place, and it lacked an ack from the platform maintainer (who would have known that the disp_pd reference got removed). Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Olof Johansson <olof@lixom.net>
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Doug Anderson authored
The EHCI and HSIC device tree nodes were added in the wrong place. Fix them. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Olof Johansson <olof@lixom.net>
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