This patch add support for the imx6dl based aristainetos board
with following configuration:

CPU:   Freescale i.MX6DL rev1.1 at 792 MHz
DRAM:  1 GiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB

As this board can used with 2 different display types, the
differences between them are extracted into 2 DTS files, and
the common settings are collected in a common file.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The fixed-regulator's enable-active-high property
is needed to indicate that the GPIO regulator is
active high.

Before that the regulator state was inverted.

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The DAI mode is and should be configured by the sound card driver as
codec and ssi have to be in the right modes to communicate with each
other. It is possible to operate the ssi unit or the codec in master mode,
sometimes even on the same board in different configurations.

With the latest changes in the fsl-ssi driver, the 'fsl,mode' property
is only handled as a fallback property. If the sound card sets the DAI
mode correctly, this fallback configuration is dropped.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

All dtsi files where already moved to generic dma bindings. Remove the
old non-generic DMA properties.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

All imx5*.dtsi files define the generic dma bindings. Drop the old
non-generic fsl,ssi-dma-events.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Replace old ssi dma properties by the generic dma properties.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The other i.mx6 variants use "vddarm" as the name of the internal regulator
that powers the core. Use the same convention here for consistency.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The S/PDIF rxtx4 and rxtx6 clock inputs are "ESAI_HCKT" and "MLB clock",
respectively, according to the SoC documentation, and they are currently
mapped to clocks "esai" and "mlb".

However, they do not seem to actually work correctly. Testing on a
Cubox-i system with fsl_spdif driver forced to select one of those as
input will result in I/O errors on audio playback, which I believe means
missing clock signal.

Possibly the "ESAI_HCKT" and "MLB clock" refer to some other clocks
related to ESAI and MLB, or we are missing something else.

Since audio playback will not work if fsl_spdif selects these clocks
(which happens rarely), set the inputs do dummy clocks, at least for
now.

Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Cc: Mark Brown <broonie@kernel.org>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The rxtx2 clock of i.MX6 S/PDIF is currently set to "asrc" clock.
However, according to SoC documentation, rxtx2 is connected to
ASRC_EXT_CLK, a different external clock.

Testing on Cubox-i system seems to confirm that: when fsl_spdif is
forced to select rxtx2 as input clock, audio playback fails with an I/O
error.

Set rxtx2 to the dummy clock by default to prevent fsl_spdif from
selecting it.

Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Cc: Mark Brown <broonie@kernel.org>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

This patch adds support for the Ka-Ro electronics GmbH TX6 modules.
There are five distinct module types with either i.MX6Q or i.MX6DL and
LVDS or LCD display interface and one DTS file for a complete system
with an i.MX6DL based TX6 module and a baseboard mounted on the back
of a display (imx6dl-tx6dl-comtft.dts).

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

This patch adds the missing (General Purpose Timer) GPT devicetree node
for i.MX35 CPUs.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The CMO-QVGA, DVI-VGA and DVI-SVGA displays were added.

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

This patch adds CSI subnodes for IPU1 and IPU2 that will contain
ports and endpoints connecting to external elements in the video
pipeline.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The 2.5V VDD_ETH_IO voltage supplied by the DA9063 LDO4 is used
to power the KSZ9031 PHY DVDDH input and to pull the necessary
pins (including bootstrap pins) high.
It also powers the i.MX6 NVCC_RGMII and NVCC_ENET inputs.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The imx6dl dts supports both DualLite and Solo CPU variants
The imx6q dts supports both Dual and Quad CPU variants

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The 'model' property in the imx-audio-sgtl5000 binding specifies the
user-visible name of the audio device. This should be something common and
not baseboard specific.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The PWM3 pinmux configuration conflicts with gpio 3.28. Introduce a regulator
for mmc0 so that it conflicts with the pwm driver and fails gracefully. The
kernel will then able to access mmc0 normally.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

when system suspend, need to set pins to low power state to
save IO power consumption, there are three states of pinctrl:
"default", "idle" and "sleep". Currently enet supports default
and sleep state.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

GPIO4_9 is used as ECSPI1 chip select and it needs to be configured as GPIO.

Configure the pin functionality explicitly in the dts file instead of relying
on the fact that it comes configured as GPIO from POR or from the bootloader.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

This patch adds support for the cpuimx27 board from Eukrea and its
baseboard. This change is intended to further remove non-DT support
for this board.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Add initial imx6sx-sdb board support with limited devices enabled.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Add initial device tree source for i.MX6 SoloX SoC.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Add pin function header for i.MX6 SoloX SoC.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The at91sam9261 doesn't actually have a slow RC oscillator, remove it from the
dtsi.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Define at91sam9261ek's slow crystal frequencies.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

mainck (CKGR_MCFR register) is actually using main_osc (CKGR_MOR register).

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3]
range.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

ICPLL can only take 0 or 1, it got mixed with OUT which can be in the [0-3]
range.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Wildcards in compatible strings should be avoid. "marvell,armada38x"
was recently introduced but was not yet used.

The armada 385 SoC is a superset of the armada 380 SoC (with more CPUs
and more PCIe slots). So this patch replaces the use of
"marvell,armada38x" by the "marvell,armada380" string.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1403533011-21339-1-git-send-email-gregory.clement@free-electrons.com


Acked-by: Andrew Lunn <andrew@lunn.ch>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

Commit eeb84545
 ("ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id")
added phy-connection-type properties to ethernet PHY nodes.

Actually, the property has to be set for the ethernet port node instead.
Fix it by moving the corresponding properties to the correct nodes.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1403555115-13111-1-git-send-email-sebastian.hesselbarth@gmail.com


Fixes: eeb84545: ('ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id')
Cc: <stable@vger.kernel.org> # v3.16+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

The following commit:
89d7e5c1 mmc: sdhci-esdhc-imx: add runtime pm support
has the effect of also disabling the hardware card detect
in runtime pm.

We switch to GPIO based detection to avoid this issue.

This patch is based on:
ARM: dts: imx51-babbage: Fix esdhc setup

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Since commit 89d7e5c1 (mmc: sdhci-esdhc-imx: add runtime pm
support), controller based card detection / write protection is not
supported anymore by esdhc driver.  Let's use GPIO for CD/WP on esdhc1
instead.

While at it, fix cd gpio polarity for esdhc2. This is wrong and
currently only works because the imx esdhc driver ignores the polarity.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Move the display {} node out of the soc {} node . This just aligns
the DT with other boards, there is no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

The "port" node was misplaced in the original patch, therefore making
the LCD dysfunctional on this board. Fix this by moving the "port" DT
node into the "display {}" node.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

Two reasons for this rename.  Firstly, it removes the camel case
convention which isn't used by any other platform and secondly it
matches the naming convention for the internal kernel, which can
become annoying when flipping between the two.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>

The factory bootloader on A385-DB boards expect the ECC strength to be
4 bits over 512 bytes. Hence, we need to specify this in the devicetree,
to prevent the kernel from assuming any different ECC scheme.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1400941030-2123-3-git-send-email-ezequiel.garcia@free-electrons.com


Signed-off-by: Jason Cooper <jason@lakedaemon.net>

The factory bootloader on A375-DB boards expect the ECC strength to be
4 bits over 512 bytes. Hence, we need to specify this in the devicetree,
to prevent the kernel from assuming any different ECC scheme.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1400941030-2123-2-git-send-email-ezequiel.garcia@free-electrons.com


Signed-off-by: Jason Cooper <jason@lakedaemon.net>