- Jul 19, 2014
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Maxime Ripard authored
This adds support for the A31 Hummingbird: http://www.merrii.com/en/pla_d.asp?id=172 The Merrii A31 Hummingbird is a development board based on the Allwinner A31 SoC with multiple USB ports through a USB hub chip, a uSD slot, a 10/100/1000M ethernet port, an AP6210 WiFi/BT chip, TV-in, HDMI, VGA, audio in/out ports, and LCD/CSI headers. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: enable usbphy, ehci0, ohci0 for on-board usb hub; add pcf8563 rtc node; add comments for i2c0 and mmc0 pull-ups; correct ethernet phy address to 0x01; drop uart2 (BT chip has no power) and uart3 (no device); use proper commit message] Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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Chen-Yu Tsai authored
Alias GMAC as ethernet0 so U-boot can fill in the MAC address. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The A31 has the same GMAC found on the A20 SoC, except it has an extra reset control. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The GMAC uses 1 of 2 sources for its transmit clock, depending on the PHY interface mode. Add both sources as dummy clocks, and as parents to the GMAC clock node. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The A31 SoC has a GMAC gigabit ethernet controller supporting MII, GMII, RGMII modes. Add pin muxing options for these modes. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jul 15, 2014
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Chen-Yu Tsai authored
With sun8i PRCM support available, we can add the PRCM clock and reset controller nodes to the DTSI. Also update R_UART's clock phandle and add it's reset control phandle. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jul 07, 2014
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Chen-Yu Tsai authored
The A23 has the same MMIO reset controllers matching the clocks gates, just like in the A31. This patch adds the reset controller nodes and the reset control phandles for the peripherals needing them to the DTSI. Unlike the sun6i DTSI, this patch uses sun6i-a31-clock-reset for ahb1_rst. sun6i-a31-ahb-reset is for early init, and requires some additions to the machine code. It is used to support the hstimer. However the hstimer on sun8i only has 1 timer, which is somewhat useless. Support for it will probably not be added. Hence the decision to use sun6i-a31-clock-reset here to avoid the changes to sun8i machine code. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jul 04, 2014
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Chen-Yu Tsai authored
Now that we have support for sun8i specific clocks in the driver, add the corresponding clock nodes to the DTSI. Also update the existing peripherals with the correct clocks. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jul 01, 2014
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Hans de Goede authored
Tested on a cubieboard and the mini-x. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The ba10 tvbox is an A10 based android tvbox, with 512M RAM, 8G nand flash, rtl8188ctv usb wifi 1 USB-A receptacle hooked up to an EHCI/OHCI controller, 1 USB-A receptacle hooked up to the OTG and 100Mbit ethernet using a rtl8201 phy. The PCB is labelled ba10 hence I've named the board ba10-tvbox. It is used in noname allwinner A10 tv-boxes. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Zoltan HERPAI authored
The LinkSprite pcDuino V3 is an A20 based development board featuring arduino compatible io headers, 1G RAM, 4G nand, sata, rtl8188cus usb wifi and 100 Mbit ethernet using an ip101a phy: http://www.pcduino.com/pcduino-v3/ Signed-off-by:
Zoltan HERPAI <wigyori@uid0.hu> [hdegoede@redhat.com: Various cleanups, correct led pins] [hdegoede@redhat.com: Add axp209, ir and gpio-keys nodes] Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The sun7i block is the same as the one in the sun4i, rename the compatible to reflect this. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> -- I've already included the matching change to sunxi-cir.c in my pull-req to Mauro. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Carlo Caione authored
At a node for the axp209, and where necessary the i2c controller to the dts for various boards. Note the axp209 regulators are omitted as we don't have any use for them yet, and on some boards were not sure how exactly they are wired up. Adding support for just the axp209 without the regulators is still useful, as it will give us power-button and poweroff support. Signed-off-by:
Carlo Caione <carlo@caione.org> [hdegoede@redhat.com: Drop the regulator bits for now] Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Carlo Caione authored
At a node for the axp209, and where necessary the i2c controller to the dts for various boards. Note the axp209 regulators are omitted as we don't have any use for them yet, and on some boards were not sure how exactly they are wired up. Adding support for just the axp209 without the regulators is still useful, as it will give us power-button and poweroff support. Signed-off-by:
Carlo Caione <carlo@caione.org> [hdegoede@redhat.com: Drop the regulator bits for now] Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The pinctrl device is also an interrupt controller for external interrupts. Add the missing #interrupt-cells property. Also remove the unused #address-cells property. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> [hdegoede@redhat.com: make the same change for sun4i, sun5i and sun6i] Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The Ippo-q8h is a tablet circuit board commonly found in cheap Android tablets with A23 SoCs. There are at least 2 versions of the board, with different peripherals, such as WiFi chips. Common features among these tablets include 512 MB DRAM, NAND, MMC, LCD, capacitive touchscreen, accelerometer, 1 or 2 camera sensors, USB OTG, microphone and speaker. v5 of these board designs has a ESP8089 WiFi chip (not supported) connected to mmc1. This patch adds very basic support. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The Allwinner A23 is a tablet oriented SoC with 2 Cortex-A7 cores and a Mali-400MP2 GPU. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jun 23, 2014
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Alexander Bersenev authored
This patch adds records for two IR controllers on A20 Signed-off-by:
Alexander Bersenev <bay@hackerdom.ru> Signed-off-by:
Alexsey Shestacov <wingrime@linux-sunxi.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jun 16, 2014
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Alexander Bersenev authored
This patch enables two IR devices in dts: - One IR device physically found on Cubieboard 2 - One IR device physically found on Cubietruck Signed-off-by:
Alexander Bersenev <bay@hackerdom.ru> Signed-off-by:
Alexsey Shestacov <wingrime@linux-sunxi.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Alexander Bersenev authored
This patch adds pins for two IR controllers on A20 Signed-off-by:
Alexander Bersenev <bay@hackerdom.ru> Signed-off-by:
Alexsey Shestacov <wingrime@linux-sunxi.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jun 14, 2014
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Andy Lutomirski authored
"make vdso_install" installs unstripped versions of the vdso objects for the benefit of the debugger. This was broken by checkin: 6f121e54 x86, vdso: Reimplement vdso.so preparation in build-time C The filenames are different now, so update the Makefile to cope. This still installs the 64-bit vdso as vdso64.so. We believe this will be okay, as the only known user is a patched gdb which is known to use build-ids, but if it turns out to be a problem we may have to add a link. Inspired by a patch from Sam Ravnborg. Acked-by:
Sam Ravnborg <sam@ravnborg.org> Reported-by:
Josh Boyer <jwboyer@fedoraproject.org> Tested-by:
Josh Boyer <jwboyer@fedoraproject.org> Signed-off-by:
Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/b10299edd8ba98d17e07dafcd895b8ecf4d99eff.1402586707.git.luto@amacapital.net Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- Jun 13, 2014
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Andy Lutomirski authored
The Go runtime has a buggy vDSO parser that currently segfaults. This writes an empty SHT_DYNSYM entry that causes Go's runtime to malfunction by thinking that the vDSO is empty rather than malfunctioning by running off the end and segfaulting. This affects x86-64 only as far as we know, so we do not need this for the i386 and x32 vdsos. Signed-off-by:
Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/d10618176c4bd39b457a5e85c497295c90cab1bc.1402620737.git.luto@amacapital.net Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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Andy Lutomirski authored
Add PUT_LE() by analogy with GET_LE() to write littleendian values in addition to reading them. Signed-off-by:
Andy Lutomirski <luto@amacapital.net> Link: http://lkml.kernel.org/r/3d9b27e92745b27b6fda1b9a98f70dc9c1246c7a.1402620737.git.luto@amacapital.net Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- Jun 12, 2014
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Brian Norris authored
These defconfigs contain the CONFIG_M25P80 symbol, which is now dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to the relevant defconfigs. At the same time, drop the now-nonexistent CONFIG_MTD_CHAR symbol. Signed-off-by:
Brian Norris <computersforpeace@gmail.com> Cc: Steven Miao <realmz6@gmail.com> Cc: adi-buildroot-devel@lists.sourceforge.net Cc: linux-kernel@vger.kernel.org
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Michal Marek authored
The rule to create the final images uses a zImage.% pattern. Unfortunately, this also matches the names of the zImage.*.lds linker scripts, which appear as a dependency of the final images. This somehow worked when $(srctree) used to be an absolute path, but now the pattern matches too much. List only the images from $(image-y) as the target of the rule, to avoid the circular dependency. Reported-and-tested-by:
Mike Qiu <qiudayu@linux.vnet.ibm.com> Signed-off-by:
Michal Marek <mmarek@suse.cz>
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Anton Blanchard authored
Commit 2749a2f2 (powerpc/book3s: Fix machine check handling for unhandled errors) introduced a few ABIv2 issues. We can maintain ABIv1 and ABIv2 compatibility by branching to the function rather than the dot symbol. Fixes: 2749a2f2 ("powerpc/book3s: Fix machine check handling for unhandled errors") Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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- Jun 11, 2014
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Mahesh Salgaonkar authored
Currently we forward MCEs to guest which have been recovered by guest. And for unhandled errors we do not deliver the MCE to guest. It looks like with no support of FWNMI in qemu, guest just panics whenever we deliver the recovered MCEs to guest. Also, the existig code used to return to host for unhandled errors which was casuing guest to hang with soft lockups inside guest and makes it difficult to recover guest instance. This patch now forwards all fatal MCEs to guest causing guest to crash/panic. And, for recovered errors we just go back to normal functioning of guest instead of returning to host. This fixes soft lockup issues in guest. This patch also fixes an issue where guest MCE events were not logged to host console. Signed-off-by:
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Mahesh Salgaonkar authored
We don't see MCE counter getting increased in /proc/interrupts which gives false impression of no MCE occurred even when there were MCE events. The machine check early handling was added for PowerKVM and we missed to increment the MCE count in the early handler. We also increment mce counters in the machine_check_exception call, but in most cases where we handle the error hypervisor never reaches there unless its fatal and we want to crash. Only during fatal situation we may see double increment of mce count. We need to fix that. But for now it always good to have some count increased instead of zero. Signed-off-by:
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Mahesh Salgaonkar authored
Currently machine check handler does not check for stack overflow for nested machine check. If we hit another MCE while inside the machine check handler repeatedly from same address then we get into risk of stack overflow which can cause huge memory corruption. This patch limits the nested MCE level to 4 and panic when we cross level 4. Signed-off-by:
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Mahesh Salgaonkar authored
Current code does not check for unhandled/unrecovered errors and return from interrupt if it is recoverable exception which in-turn triggers same machine check exception in a loop causing hypervisor to be unresponsive. This patch fixes this situation and forces hypervisor to panic for unhandled/unrecovered errors. This patch also fixes another issue where unrecoverable_exception routine was called in real mode in case of unrecoverable exception (MSR_RI = 0). This causes another exception vector 0x300 (data access) during system crash leading to confusion while debugging cause of the system crash. Also turn ME bit off while going down, so that when another MCE is hit during panic path, system will checkstop and hypervisor will get restarted cleanly by SP. With the above fixes we now throw correct console messages (see below) while crashing the system in case of unhandled/unrecoverable machine checks. -------------- Severe Machine check interrupt [[Not recovered] Initiator: CPU Error type: UE [Instruction fetch] Effective address: 0000000030002864 Oops: Machine check, sig: 7 [#1] SMP NR_CPUS=2048 NUMA PowerNV Modules linked in: bork(O) bridge stp llc kvm [last unloaded: bork] CPU: 36 PID: 55162 Comm: bash Tainted: G O 3.14.0mce #1 task: c000002d72d022d0 ti: c000000007ec0000 task.ti: c000002d72de4000 NIP: 0000000030002864 LR: 00000000300151a4 CTR: 000000003001518c REGS: c000000007ec3d80 TRAP: 0200 Tainted: G O (3.14.0mce) MSR: 9000000000041002 <SF,HV,ME,RI> CR: 28222848 XER: 20000000 CFAR: 0000000030002838 DAR: d0000000004d0000 DSISR: 00000000 SOFTE: 1 GPR00: 000000003001512c 0000000031f92cb0 0000000030078af0 0000000030002864 GPR04: d0000000004d0000 0000000000000000 0000000030002864 ffffffffffffffc9 GPR08: 0000000000000024 0000000030008af0 000000000000002c c00000000150e728 GPR12: 9000000000041002 0000000031f90000 0000000010142550 0000000040000000 GPR16: 0000000010143cdc 0000000000000000 00000000101306fc 00000000101424dc GPR20: 00000000101424e0 000000001013c6f0 0000000000000000 0000000000000000 GPR24: 0000000010143ce0 00000000100f6440 c000002d72de7e00 c000002d72860250 GPR28: c000002d72860240 c000002d72ac0038 0000000000000008 0000000000040000 NIP [0000000030002864] 0x30002864 LR [00000000300151a4] 0x300151a4 Call Trace: Instruction dump: XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ---[ end trace 7285f0beac1e29d3 ]--- Sending IPI to other CPUs IPI complete OPAL V3 detected ! -------------- Signed-off-by:
Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Gavin Shan authored
As Ben suggested, it's meaningful to dump PE's location code for site engineers when hitting EEH errors. The patch introduces function eeh_pe_loc_get() to retireve the location code from dev-tree so that we can output it when hitting EEH errors. If primary PE bus is root bus, the PHB's dev-node would be tried prior to root port's dev-node. Otherwise, the upstream bridge's dev-node of the primary PE bus will be check for the location code directly. Signed-off-by:
Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Alexei Starovoitov authored
The macro 'A' used in internal BPF interpreter: #define A regs[insn->a_reg] was easily confused with the name of classic BPF register 'A', since 'A' would mean two different things depending on context. This patch is trying to clean up the naming and clarify its usage in the following way: - A and X are names of two classic BPF registers - BPF_REG_A denotes internal BPF register R0 used to map classic register A in internal BPF programs generated from classic - BPF_REG_X denotes internal BPF register R7 used to map classic register X in internal BPF programs generated from classic - internal BPF instruction format: struct sock_filter_int { __u8 code; /* opcode */ __u8 dst_reg:4; /* dest register */ __u8 src_reg:4; /* source register */ __s16 off; /* signed offset */ __s32 imm; /* signed immediate constant */ }; - BPF_X/BPF_K is 1 bit used to encode source operand of...
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Michael Neuling authored
This patch enables POWER8 doorbell IPIs on powernv. Since doorbells can only IPI within a core, we test to see when we can use doorbells and if not we fall back to XICS. This also enables hypervisor doorbells to wakeup us up from nap/sleep via the LPCR PECEDH bit. Based on tests by Anton, the best case IPI latency between two threads dropped from 894ns to 512ns. Signed-off-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Gavin Shan authored
On PowerNV platform, EEH errors are reported by IO accessors or poller driven by interrupt. After the PE is isolated, we won't produce EEH event for the PE. The current implementation has possibility of EEH event lost in this way: The interrupt handler queues one "special" event, which drives the poller. EEH thread doesn't pick the special event yet. IO accessors kicks in, the frozen PE is marked as "isolated" and EEH event is queued to the list. EEH thread runs because of special event and purge all existing EEH events. However, we never produce an other EEH event for the frozen PE. Eventually, the PE is marked as "isolated" and we don't have EEH event to recover it. The patch fixes the issue to keep EEH events for PEs that have been marked as "isolated" with the help of additional "force" help to eeh_remove_event(). Reported-by:
Rolf Brudeseth <rolfb@us.ibm.com> Signed-off-by:
Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Paul Bolle authored
Commit b0d278b7 ("powerpc/perf_event: Reduce latency of calling perf_event_do_pending") added a check for CONFIG_PMAC were a check for CONFIG_PPC_PMAC was clearly intended. Fixes: b0d278b7 ("powerpc/perf_event: Reduce latency of calling perf_event_do_pending") Signed-off-by:
Paul Bolle <pebolle@tiscali.nl> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Paul Bolle authored
Commit cd64d169 ("powerpc: mtmsrd not defined") added a check for CONFIG_PPC_CPU were a check for CONFIG_PPC_FPU was clearly intended. Fixes: cd64d169 ("powerpc: mtmsrd not defined") Signed-off-by:
Paul Bolle <pebolle@tiscali.nl> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Gavin Shan authored
Commit cb5b242c ("powerpc/eeh: Escalate error on non-existing PE") escalates the frozen state on non-existing PE to fenced PHB. It was to improve kdump reliability. After that, commit 361f2a2a ("powrpc/powernv: Reset PHB in kdump kernel") was introduced to issue complete reset on all PHBs to increase the reliability of kdump kernel. Commit cb5b242c becomes unuseful and it would be reverted. Signed-off-by:
Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Gavin Shan authored
When we have the corner case of frozen parent and child PE at the same time, we have to handle the frozen parent PE prior to the child. Without clearning the frozen state on parent PE, the child PE can't be recovered successfully. The patch searches the EEH PE hierarchy tree and returns the toppest frozen PE to be handled. It ensures the frozen parent PE will be handled prior to child PE. Signed-off-by:
Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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