- Nov 15, 2016
-
-
Peter Chen authored
It is the 10th processor in the well-known imx6 series, and derived from imx6ul but cost optimized. The more information about imx6ull can be found at: http://www.nxp.com/products/microcontrollers-and-processors/ arm-processors/i.mx-applications-processors/i.mx-6-processors /i.mx6qp/i.mx-6ull-single-core-processor-with-arm-cortex-a7-core :i.MX6ULL imx6ul.dtsi is the SoC common stuff for both imx6ul and imx6ull; imx6ul-14x14-evk.dts is the board common stuff for both imx6ul and imx6ull 14x14 evk. In this patch, for SoC part, the imx6ull.dtsi includes imx6ul.dtsi; for board part, imx6ull-14x14-evk.dts includes imx6ul-14x14-evk.dts. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Sudeep Holla authored
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to check for/support the legacy "gpio-key,wakeup" boolean property to enable gpio buttons as wakeup source, "wakeup-source" is the new standard binding. This patch replaces the legacy "gpio-key,wakeup" with the unified "wakeup-source" property in order to avoid any further copy-paste duplication. Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Nov 14, 2016
-
-
Sanchayan Maity authored
Enable DMA for DSPI2 and DSPI3 on Vybrid. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fabio Estevam authored
As explained by commit 9c0da3cc ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Christopher Spinrath authored
It turns out that the i2c1 adapter is connected to a multiplexer controlled by a gpio line. The first (default) mux option connects i2c1 to a bus connected to the already known peripherals. The other one connects the adapter to the ddc pins of the DVI port. Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Frank Li authored
MMDC has a slightly different programming model between imx6q and imx6qp in terms of perf support, it's exactly same for suspend support, so we have fsl,imx6q-mmdc here to save patching suspend driver with the new compatible. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fabio Estevam authored
Add a compatible entry for the specific board versions. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Marek Vasut authored
The board is now manufactured by Aries Embedded GmbH, update compat string. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Marek Vasut authored
The board is now manufactured by Aries Embedded GmbH, update compat string. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Nov 07, 2016
-
-
Peter Chen authored
We need to change trimming value (as a percentage) of the 17.78mA TX reference current for better signal quality. With this change, we can pass the eye-diagram test on this board. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Peter Chen authored
We need to change trimming value (as a percentage) of the 17.78mA TX reference current for better signal quality. With this change, we can pass the eye-diagram test on this board. Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Nov 05, 2016
-
-
Joshua Clayton authored
imx-weim should always set address-cells to 2, and size_cells to 1. On imx6, fsl,weim-cs-gpr will always be &gpr Set these common parameters in the dtsi file, rather than in a downstream dts. Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Nov 02, 2016
-
-
Jagan Teki authored
Fixed code indent tabs in respetcive imx23, imx51, imx53, imx6dl, imx6q and imx6sx dtsi and dts files. Signed-off-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Gary Bisson authored
Therefore aligning the panel nodes name across all platforms. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Gary Bisson authored
Therefore aligning the panel nodes name across all platforms. Also removing the bt_rfkill node since the mainline rfkill-gpio driver doesn't support device trees. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Gary Bisson authored
Also aligning the panel nodes name across all platforms. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Gary Bisson authored
Also aligning the panel nodes name across all platforms. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Gary Bisson authored
SoM based on i.MX6 Quad with 1GB of DDR3. https://boundarydevices.com/product/nit6x-som-v2/ Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Nov 01, 2016
-
-
Jagan Teki authored
Add FEC support for Engicam i.CoreM6 dql modules. Observed similar 'eth0: link is not ready' issue which was discussed in [1] due rmii mode with external ref_clk, so added clock node along with the properties mentioned by Shawn in [2] FEC link log: ------------ $ ifconfig eth0 up [ 27.905187] SMSC LAN8710/LAN8720 2188000.ethernet:00: attached PHY driver [SMSC LAN8710/LAN8720] (mii_bus:phy_addr=2188000.ethernet:00, irq=-1) [ 27.918982] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [1] https://patchwork.kernel.org/patch/3491061/ [2] https://patchwork.kernel.org/patch/3490511/ Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Jagan Teki authored
i.CoreM6 DualLite/Solo modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DL, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Jagan Teki authored
i.CoreM6 Quad/Dual modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DQ, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Peter Chen authored
With commit 851ce932 ("usb: chipidea: otg: don't wait vbus drops below BSV when starts host"), the driver can support enabling vbus output without software control, so this board (control vbus output through ID pin) can support dual-role now. Signed-off-by: Peter Chen <peter.chen@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Oct 24, 2016
-
-
Marcin Niestroj authored
liteBoard is a development board which uses liteSOM as its base. Hardware specification: * liteSOM (i.MX6UL, DRAM, eMMC) * Ethernet PHY (id 0) * USB host (usb_otg1) * MicroSD slot (uSDHC1) Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Marcin Niestroj authored
This is a SOM (System on Module), so it will be part of another boards. Hence, this is a "dtsi" file that will be included from another device tree files. Hardware specification: * Freescale i.MX6UL SoC * up to 512 MB RAM * eMMC on uSDHC2 Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Marek Vasut authored
Enable PWM1, otherwise the backlight cannot work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andreas Färber authored
Add initial device trees for UDOO Neo Basic, Extended and Full boards: * Serial console is enabled, other serial ports are prepared. * I2C based PMIC is enabled. * Ethernet is enabled for Basic and Full. * SDHC is enabled, with the SDIO_PWR GPIO modeled as a regulator. * Both user LEDs are enabled, with the orange one reserved for the M4 and with the SD card as default trigger for the red LED. The decision on a board compatible string is deferred to later. Cc: Ettore Chimenti <ettore.chimenti@udoo.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Hongtao Jia authored
Also add nodes and properties for thermal management support. Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Sanchayan Maity authored
Enable DMA for DSPI on Vybrid. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Marek Vasut authored
The LCDIF interrupt should be triggered by the rising edge of the IRQ line because we only want the interrupt to trigger once per each frame. It seems the LCDIF IRQ line cannot be explicitly de-asserted by software, so the previous behavior before this patch, where the interrupt was triggered by level-high status of the IRQ line, caused the interrupt to fire again immediatelly after it was handled, which caused the system to lock up due to the high rate of interrupts. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andrey Smirnov authored
Add node corresponding to OCOTP IP block. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Andrey Smirnov authored
I2C3 bus was only brought out in revision A1 of the board and revision B1 only brings out 3 I2C busses (I2C0, I2C1 and I2C2). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Jagan Teki authored
Fixed error in trailing whitespace in wandboard-rev1 dtsi. Signed-off-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Jagan Teki authored
Fixed code indent tabs in respetcive imx6qdl dtsi files. Signed-off-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Jagan Teki authored
Fixed no space before tabs warnings in respetcive imx6qdl dtsi files. Signed-off-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Oct 23, 2016
-
-
Jaret Cantu authored
Calibrate the USB PHY TX settings to pass the eye diagram signal integrity test. The settings are taken from the i.MX6 reference manual's recommended configuration for USB certification (66.2.6). Signed-off-by: Jaret Cantu <jaret.cantu@timesys.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Oct 22, 2016
-
-
Sanchayan Maity authored
Use enable-gpios property of PWM backlight driver for backlight control. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Sanchayan Maity authored
Remove use of pwm-leds and use the standard /sys/class/pwm interface from PWM subsystem. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Sanchayan Maity authored
Add support for Toradex Colibri iMX6 module. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- Oct 03, 2016
-
-
Vladimir Zapolskiy authored
The change adds a new device node with description of generic SRAM on-chip memory found on NXP LPC32xx SoC series and connected to AHB matrix slave port 3. Note that NXP LPC3220 SoC has 128KiB of SRAM memory, the other LPC3230, LPC3240 and LPC3250 SoCs all have 256KiB SRAM space, in the shared DTSI file this change specifies 128KiB SRAM size. Also it's worth to mention that the SRAM area contains of 64KiB banks, 2 banks on LPC3220 and 4 banks on the other SoCs from the series, and all SRAM banks but the first one have independent power controls, the description of this feature will be added with the introduction of power domains for the SoC series. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
-
Srinivas Ramana authored
If the bootloader uses the long descriptor format and jumps to kernel decompressor code, TTBCR may not be in a right state. Before enabling the MMU, it is required to clear the TTBCR.PD0 field to use TTBR0 for translation table walks. The commit dbece458 ("ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores") does the reset of TTBCR.N, but doesn't consider all the bits for the size of TTBCR.N. Clear TTBCR.PD0 field and reset all the three bits of TTBCR.N to indicate the use of TTBR0 and the correct base address width. Fixes: dbece458 ("ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores") Acked-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Srinivas Ramana <sramana@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-