Skip to content
  1. Jul 16, 2019
    • José Roberto de Souza's avatar
      drm/i915: Enable hotplug retry · bb80c925
      José Roberto de Souza authored
      
      
      Right now we are aware of two cases that needs another hotplug retry:
      - Unpowered type-c dongles
      - HDMI slow unplug
      
      Both have a complete explanation in the code to schedule another run
      of the hotplug handler.
      
      It could have more checks to just trigger the retry in those two
      specific cases but why would sink signal a long pulse if there is
      no change? Also the drawback of running the hotplug handler again
      is really low and that could fix another cases that we are not
      aware.
      
      Also retrying for old DP ports(non-DDI) to make it consistent and not
      cause CI failures if those systems are connected to chamelium boards
      that will be used to simulate the issues reported in here.
      
      v2: Also retrying for old DP ports(non-DDI)(Imre)
      
      v4: Renamed INTEL_HOTPLUG_NOCHANGE to INTEL_HOTPLUG_UNCHANGED to keep
      it consistent(Rodrigo)
      
      Tested-by: default avatarTimo Aaltonen <tjaalton@ubuntu.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Imre Deak <imre.deak@intel.com>
      Cc: Jani Nikula <jani.nikula@intel.com>
      Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
      Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712005343.24571-2-jose.souza@intel.com
      bb80c925
    • Imre Deak's avatar
      drm/i915: Add support for retrying hotplug · 3944709d
      Imre Deak authored
      
      
      There is some scenarios that we are aware that sink probe can fail,
      so lets add the infrastructure to let hotplug() hook to request
      another probe after some time.
      
      v2: Handle shared HPD pins (Imre)
      v3: Rebased
      v4: Renamed INTEL_HOTPLUG_NOCHANGE to INTEL_HOTPLUG_UNCHANGED to keep
      it consistent(Rodrigo)
      v5: Making the working queue used explicit through all the callers to
      hotplug_work (Ville)
      
      Tested-by: default avatarTimo Aaltonen <tjaalton@ubuntu.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712005343.24571-1-jose.souza@intel.com
      3944709d
    • Matt Roper's avatar
      drm/i915/ehl: Map MCC pins based on PHY, not port · 48cf0a1e
      Matt Roper authored
      
      
      Now that we distinguish between phy and port(ddi), mcc_port_to_ddc_pin
      should use the phy, not the DDI, for determining DDC pins.
      
      We're only converting the MCC function at the moment since EHL is the
      only platform that has configurations where port!=phy.
      
      Cc: José Roberto de Souza <jose.souza@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712221641.21031-1-matthew.d.roper@intel.com
      Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      48cf0a1e
  2. Jul 15, 2019
    • Chris Wilson's avatar
      drm/i915/selftests: Ignore self-preemption suppression under gvt · 506927ec
      Chris Wilson authored
      
      
      GVT forces single port submission of individual requests. We do not
      enjoy the context amalgamation that the test depends upon for setting up
      the test (where port 0 has a large number of requests with a priority
      change somewhere in the middle). Under single request submission of gvt
      it is quite able for the preemption event to occur while another context
      is active and so there be a real need to act upon that preemption.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111108
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
      Acked-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712082549.25053-1-chris@chris-wilson.co.uk
      506927ec
  3. Jul 14, 2019
  4. Jul 13, 2019
    • Chris Wilson's avatar
      drm/i915/gt: Use intel_gt as the primary object for handling resets · cb823ed9
      Chris Wilson authored
      
      
      Having taken the first step in encapsulating the functionality by moving
      the related files under gt/, the next step is to start encapsulating by
      passing around the relevant structs rather than the global
      drm_i915_private. In this step, we pass intel_gt to intel_reset.c
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Reviewed-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712192953.9187-1-chris@chris-wilson.co.uk
      cb823ed9
    • Lucas De Marchi's avatar
      drm/i915/tgl: add modular FIA to device info · 139ab811
      Lucas De Marchi authored
      
      
      Tiger Lake has modular FIA bit indicating if we are using it, so add to
      the device info.
      
      Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
      Reviewed-by: default avatarStuart Summers <stuart.summers@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712055706.12143-3-lucas.demarchi@intel.com
      139ab811
    • Anusha Srivatsa's avatar
      drm/i915: Add modular FIA · 0caf6257
      Anusha Srivatsa authored
      
      
      Some platforms may have Modular FIA. If Modular FIA is used in the SOC,
      then Display Driver will access the additional instances of
      FIA based on pre-assigned offset in GTTMADDR space.
      
      Each Modular FIA instance has its own IOSF Sideband Port ID
      and it houses only 2 Type-C Port. In SOC that has more than
      two Type-C Ports, there are multiple instances of Modular FIA.
      Gunit will need to use different destination ID when it access
      different pair of Type-C Port.
      
      The DFLEXDPSP register has Modular FIA bit starting on Tiger Lake.  If
      Modular FIA is used in the SOC, this register bit exists in all the
      instances of Modular FIA. IOM FW is required to program only the MF bit
      in first FIA instance that houses the Type-C Port 0 and Port 1, for
      Display Driver to read from.
      
      v2 (Lucas):
        - Move all accesses to FIA to be contained in intel_tc.c, along with
          display_fia that is now called tc_phy_fia
        - Save the fia instance number on intel_digital_port, so we don't have
          to query if modular FIA is used on every access
      v3 (Lucas): Make function static
      v4 (Lucas): Move enum phy_fia to the header and use it in
         intel_digital_port (suggested by Ville)
      v5 (Lucas): Add comment about the mapping between FIA and TC port
         (suggested by Stuart)
      
      Cc: Jani Nikula <jani.nikula@intel.com>
      Signed-off-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
      Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
      Acked-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: default avatarStuart Summers <stuart.summers@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712055706.12143-2-lucas.demarchi@intel.com
      0caf6257
    • Chris Wilson's avatar
      drm/i915/gtt: Recursive ppgtt clear for gen8 · 4c2be3c5
      Chris Wilson authored
      
      
      With an explicit level, we can refactor the separate clear functions
      as a simple recursive function. The additional knowledge of the level
      allows us to spot when we can free an entire subtree at once.
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarAbdiel Janulgue <abdiel.janulgue@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712112725.2892-3-chris@chris-wilson.co.uk
      4c2be3c5
    • Chris Wilson's avatar
      drm/i915/gtt: Recursive cleanup for gen8 · 1eda701e
      Chris Wilson authored
      
      
      With an explicit level, we can refactor the separate cleanup functions
      as a simple recursive function. We take the opportunity to pass down the
      size of each level so that we can deal with the different sizes of
      top-level and avoid over allocating for 32/36-bit vm.
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarAbdiel Janulgue <abdiel.janulgue@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712112725.2892-2-chris@chris-wilson.co.uk
      1eda701e
    • Chris Wilson's avatar
      drm/i915/display: Drop kerneldoc for 'intel_atomic_commit' · 80140463
      Chris Wilson authored
      
      
      intel_atomic_commit() is not for use internally, but only as an entry
      point from the core drm atomic helper (drm_atomic_commit).
      
      Squelches the warning for:
      drivers/gpu/drm/i915/display/intel_display.c:14148: warning: Function parameter or member '_state' not described in 'intel_atomic_commit'
      drivers/gpu/drm/i915/display/intel_display.c:14148: warning: Excess function parameter 'state' description in 'intel_atomic_commit'
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190712134234.29893-1-chris@chris-wilson.co.uk
      80140463
  5. Jul 12, 2019