- Jan 24, 2017
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Jagan Teki authored
Engicam Is.IoT MX6UL has separate module for NAND, so add nand dts file for imx6ul-isiot.dtsi. dmesg: ----- nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda nand: Micron MT29F2G08ABAEAH4 nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 gpmi-nand 1806000.gpmi-nand: enable the asynchronous EDO mode 5 gpmi-nand 1806000.gpmi-nand: driver registered. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Jagan Teki authored
Engicam Is.IoT MX6UL has separate module for eMMC, so add emmc dts file for imx6ul-isiot.dtsi, usdhc2 node represent eMMC. dmesg: ----- mmc1: SDHCI controller on 2194000.usdhc [2194000.usdhc] using ADMA mmc1: new DDR MMC card at address 0001 mmcblk1: mmc1:0001 M62704 3.53 GiB Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- Jan 23, 2017
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Jagan Teki authored
Fixed code indent tabs in respective imx6qdl dtsi files and also add space on imx6qdl-icore-rqs.dtsi on usdhc bus-width nodes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Vivien Didelot authored
The ZII Dev Rev C board has EEPROMs hanging the 88E6390 Ethernet switch chips. Add an "eeprom-length" property to allow access from ethtool. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Sébastien Szymanski authored
OPOS6UL is an i.MX6UL based SoM. OPOS6ULDev is a carrier board for the OPOS6UL SoM. For more details see: http://www.opossom.com/english/products-processor_boards-opos6ul.html http://www.opossom.com/english/products-development_boards-opos6ul_dev.html Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
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Christopher Spinrath authored
Apart from the already enabled Designware HDMI port, the Utilite Pro has a second display pipeline which has the following shape: IPU1 DI0 --> Parallel display --> tfp410 rgb24 to DVI encoder --> HDMI connector. Enable support for it. In addition, since this pipeline is hardwired to IPU1, sever the link between IPU1 and the SoC-internal Designware HDMI encoder forcing the latter to be connected to IPU2 instead of IPU1. Otherwise, it is not possible to drive both displays at high resolution due to the bandwidth limitations of a single IPU. Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- Jan 10, 2017
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Andrey Smirnov authored
Add .dts file for rev. C of the board by factoring out commonalities into a shared include file (vf610-zii-dev-rev-b-c.dtsi) and deriving revision specific file from it (vf610-zii-dev-rev-b.dts and vf610-zii-dev-reb-c.dts). Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Stefan Agner <stefan@agner.ch> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: andrew@lunn.ch Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Cc: cphealy@gmail.com Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Andrey Smirnov authored
Remove pwm0grp since it is: a) Not referenced anywhere in the DTS file (unlike Tower board it is based on, this board does not use/expose FTM0) b) Configures PTB2 and PTB3 in a way that contradicts pinctrl-mdio-mux Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Stefan Agner <stefan@agner.ch> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: andrew@lunn.ch Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Cc: cphealy@gmail.com Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Milo Kim authored
Use common board file and support SATA interface additionally. Specify the dtb file for i.MX6 build. Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Milo Kim authored
Common savageboard DT file is used for board support. Add the vendor name and specify the dtb file for i.MX6Q build. Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Milo Kim authored
* Memory memblock for DDR3 1GB * Regulator 3.3V for panel and backlight. * Display Enable HDMI and LVDS panel. Savageboard supports AVIC TM097TDH02 panel which is compatible with Hannstar HSD100PXN1, so reuse it. * Clock The commit d28be499 ("ARM: dts: imx6qdl-sabresd: Allow HDMI and LVDS to work simultaneously") is applied to support LVDS and HDMI output at the same time. * Pinmux Support eMMC, ethernet, gpio key for power button, I2C, PWM, SD card and UART. * Others Enable ethernet, UART1 debug, USB host, USDHC3 for microSD card and USDHC4 for built-in eMMC storage. Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
On imx53-qsb the TVE DAC regulator comes from: - LDO7 on the board with the Dialog DA9052 PMIC - VDAC on the board with the MC34708 PMIC Pass them in the 'dac-supply' node. While at it, remove the 'regulator-always-on/regulator-boot-on' properties as the TVE driver will properly handle it. Tested on a imx53-qsb board with a Dialog DA9052 PMIC. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lukasz Majewski authored
This patch provides support for Liebherr's Monitor 6 board (abverrated as mccmon6) to Linux kernel. Signed-off-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alexandre Belloni authored
The license text has been mangled at some point then copy pasted across multiple files. Restore it to what it should be. Note that this is not intended as a license change. Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Martin Kaiser authored
The DryIce block on i.MX25 chipset uses two interrupts: A normal and a security violation interrupt. Add the security violation interrupt to the list, it is optional. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
Add ocotp node for i.MX6UL SOC. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- Jan 03, 2017
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Jagan Teki authored
Is.IoT MX6UL modules are system on module solutions manufactured by Engicam for IOT connectivity applications with following characteristics: CPU NXP i.MX6UL (G2) Cortex-A7@528 MHz RAM Up to 512 MB LvDDR3@800MT/s NAND 256MB (option) eMMC 4GB (option) LCD 18 bit parallel BT 2.1+EDR,Bluetooth 3.0, Bluetooth 4.1 (Bluetooth low energy) WLAN IEEE 802.11 b/g/n (single stream n) Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Jagan Teki authored
Engicam i.CoreM6 Dual and Quad SOM's use same dts file, hence update model name to add Dual and also added full mode decsription. Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Jagan Teki authored
i.CoreM6 DualLite/Solo modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DL, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Property 'anatop-enable-bit' does not exist, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- Jan 02, 2017
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Vladimir Zapolskiy authored
Since commit b36581df ("spi: imx: Using existing properties for chipselects") the device tree property 'fsl,spi-num-chipselects' is unused and it is already marked as obsolete in device tree binding documentation. Remove the property from the existing DTS files to avoid its reoccurence on copying. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Jörg Krause authored
Add simple-card support to SAIF0 and SAIF1. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
imx6sx-udoo-neo has a KSZ8091 Ethernet PHY, which requires the reset signal to be low for at least 10ms. Pass the 'phy-reset-duration' property to reflect such requirement. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Gary Bisson authored
The bus format is therefore retrieved from the connected panel information. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Christopher Spinrath authored
Enable the S/PDIF transceiver present on the cm-fx6 module. Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
All of the Gateworks Ventana boards based on the IMX6 SoC except for the GW54xx use the LTC3676 PMIC. Add a device-tree node with interrupt support for this PMIC. Additionally remove the simple-bus notation in the regulator nodes and any fixed regulators that are provided by the PMIC. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
The GW54xx revision E adds SPI via an off-board connector. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Make CPU nodes consistent throughout the i.MX dts files, which also matches the description from ePAPR spec. This also fixes the following W=1 warning in some cases: Warning (unit_address_vs_reg): Node /cpus/cpu@0 has a unit name, but no reg property Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- Dec 25, 2016
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Thomas Gleixner authored
There is no point in having an extra type for extra confusion. u64 is unambiguous. Conversion was done with the following coccinelle script: @rem@ @@ -typedef u64 cycle_t; @fix@ typedef cycle_t; @@ -cycle_t +u64 Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: John Stultz <john.stultz@linaro.org>
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Thomas Gleixner authored
When the state names got added a script was used to add the extra argument to the calls. The script basically converted the state constant to a string, but the cleanup to convert these strings into meaningful ones did not happen. Replace all the useless strings with 'subsys/xxx/yyy:state' strings which are used in all the other places already. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Link: http://lkml.kernel.org/r/20161221192112.085444152@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Thomas Gleixner authored
The cpu hotplug support of this perf driver is broken in several ways: 1) It adds a instance before setting up the state. 2) The state for the instance is different from the state of the callback. It's just a randomly chosen state. 3) The instance registration is not error checked so nobody noticed that the call can never succeed. 4) The state for the multi install callbacks is chosen randomly and overwrites existing state. This is now prevented by the core code so the call is guaranteed to fail. 5) The error exit path in the init function leaves the instance registered and then frees the memory which contains the enqueued hlist node. 6) The remove function is removing the state and not the instance. Fix it by: - Setting up the state before adding instances. Use a dynamically allocated state for it. - Installing instances after the state has been set up - Removing the instance in the error path before freeing memory - Removing the instance not the state in the driver remove callback While at is use raw_cpu_processor_id(), because cpu_processor_id() cannot be used in preemptible context, and set the driver data after successful registration of the pmu. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Shawn Guo <shawnguo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Cc: Frank Li <frank.li@nxp.com> Cc: Zhengyu Shen <zhengyu.shen@nxp.com> Link: http://lkml.kernel.org/r/20161221192111.596204211@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Linus Torvalds authored
This was entirely automated, using the script by Al: PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*<asm/uaccess.h>' sed -i -e "s!$PATT!#include <linux/uaccess.h>!" \ $(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h) to do the replacement at the end of the merge window. Requested-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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- Dec 21, 2016
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Dongpo Li authored
The SoC hix5hd2 compatible string has the suffix "-gmac" and we should not change it. We should only add the generic compatible string "hisi-gmac-v1". Fixes: 0855950b ("ARM: dts: hix5hd2: add gmac generic compatible and clock names") Signed-off-by: Dongpo Li <lidongpo@hisilicon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- Dec 16, 2016
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Michael S. Tsirkin authored
__bitwise__ used to mean "yes, please enable sparse checks unconditionally", but now that we dropped __CHECK_ENDIAN__ __bitwise is exactly the same. There aren't many users, replace it by __bitwise everywhere. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Stefan Schmidt <stefan@osg.samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Akced-by: Lee Duncan <lduncan@suse.com>
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- Dec 15, 2016
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Alexander Duyck authored
The use of DMA_ATTR_SKIP_CPU_SYNC was not consistent across all of the DMA APIs in the arch/arm folder. This change is meant to correct that so that we get consistent behavior. Link: http://lkml.kernel.org/r/20161110113424.76501.2715.stgit@ahduyck-blue-test.jf.intel.com Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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- Dec 13, 2016
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Aneesh Kumar K.V authored
Now that we check for page size change early in the loop, we can partially revert e9d55e15 ("mm: change the interface for __tlb_remove_page"). This simplies the code much, by removing the need to track the last address with which we adjusted the range. We also go back to the older way of filling the mmu_gather array, ie, we add an entry and then check whether the gather batch is full. Link: http://lkml.kernel.org/r/20161026084839.27299-6-aneesh.kumar@linux.vnet.ibm.com Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: "Kirill A. Shutemov" <kirill@shutemov.name> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Ross Zwisler <ross.zwisler@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Aneesh Kumar K.V authored
With commit e77b0852 ("mm/mmu_gather: track page size with mmu gather and force flush if page size change") we added the ability to force a tlb flush when the page size change in a mmu_gather loop. We did that by checking for a page size change every time we added a page to mmu_gather for lazy flush/remove. We can improve that by moving the page size change check early and not doing it every time we add a page. This also helps us to do tlb flush when invalidating a range covering dax mapping. Wrt dax mapping we don't have a backing struct page and hence we don't call tlb_remove_page, which earlier forced the tlb flush on page size change. Moving the page size change check earlier means we will do the same even for dax mapping. We also avoid doing this check on architecture other than powerpc. In a later patch we will remove page size check from tlb_remove_page(). Link: http://lkml.kernel.org/r/20161026084839.27299-5-aneesh.kumar@linux.vnet.ibm.com Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: "Kirill A. Shutemov" <kirill@shutemov.name> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Ross Zwisler <ross.zwisler@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Aneesh Kumar K.V authored
This add tlb_remove_hugetlb_entry similar to tlb_remove_pmd_tlb_entry. Link: http://lkml.kernel.org/r/20161026084839.27299-4-aneesh.kumar@linux.vnet.ibm.com Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: "Kirill A. Shutemov" <kirill@shutemov.name> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Ross Zwisler <ross.zwisler@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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- Dec 09, 2016
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Roger Shimizu authored
Bug report from Debian [0] shows there's minor changed model of Linkstation LS-GL that uses the 2nd SATA port of the SoC. So it's necessary to enable two SATA ports, though for that specific model only the 2nd one is used. [0] https://bugs.debian.org/845611 Fixes: b1742ffa ("ARM: dts: orion5x: add device tree for buffalo linkstation ls-gl") Reported-by: Ryan Tandy <ryan@nardis.ca> Tested-by: Ryan Tandy <ryan@nardis.ca> Signed-off-by: Roger Shimizu <rogershimizu@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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- Dec 08, 2016
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Julien Grall authored
The function xen_guest_init is using __alloc_percpu with an alignment which are not power of two. However, the percpu allocator never supported alignments which are not power of two and has always behaved incorectly in thise case. Commit 3ca45a46 "percpu: ensure requested alignment is power of two" introduced a check which trigger a warning [1] when booting linux-next on Xen. But in reality this bug was always present. This can be fixed by replacing the call to __alloc_percpu with alloc_percpu. The latter will use an alignment which are a power of two. [1] [ 0.023921] illegal size (48) or align (48) for percpu allocation [ 0.024167] ------------[ cut here ]------------ [ 0.024344] WARNING: CPU: 0 PID: 1 at linux/mm/percpu.c:892 pcpu_alloc+0x88/0x6c0 [ 0.024584] Modules linked in: [ 0.024708] [ 0.024804] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-rc7-next-20161128 #473 [ 0.025012] Hardware name: Foundation-v8A (DT) [ 0.025162] task: ffff80003d870000 task.stack: ffff80003d844000 [ 0.025351] PC is at pcpu_alloc+0x88/0x6c0 [ 0.025490] LR is at pcpu_alloc+0x88/0x6c0 [ 0.025624] pc : [<ffff00000818e678>] lr : [<ffff00000818e678>] pstate: 60000045 [ 0.025830] sp : ffff80003d847cd0 [ 0.025946] x29: ffff80003d847cd0 x28: 0000000000000000 [ 0.026147] x27: 0000000000000000 x26: 0000000000000000 [ 0.026348] x25: 0000000000000000 x24: 0000000000000000 [ 0.026549] x23: 0000000000000000 x22: 00000000024000c0 [ 0.026752] x21: ffff000008e97000 x20: 0000000000000000 [ 0.026953] x19: 0000000000000030 x18: 0000000000000010 [ 0.027155] x17: 0000000000000a3f x16: 00000000deadbeef [ 0.027357] x15: 0000000000000006 x14: ffff000088f79c3f [ 0.027573] x13: ffff000008f79c4d x12: 0000000000000041 [ 0.027782] x11: 0000000000000006 x10: 0000000000000042 [ 0.027995] x9 : ffff80003d847a40 x8 : 6f697461636f6c6c [ 0.028208] x7 : 6120757063726570 x6 : ffff000008f79c84 [ 0.028419] x5 : 0000000000000005 x4 : 0000000000000000 [ 0.028628] x3 : 0000000000000000 x2 : 000000000000017f [ 0.028840] x1 : ffff80003d870000 x0 : 0000000000000035 [ 0.029056] [ 0.029152] ---[ end trace 0000000000000000 ]--- [ 0.029297] Call trace: [ 0.029403] Exception stack(0xffff80003d847b00 to 0xffff80003d847c30) [ 0.029621] 7b00: 0000000000000030 0001000000000000 ffff80003d847cd0 ffff00000818e678 [ 0.029901] 7b20: 0000000000000002 0000000000000004 ffff000008f7c060 0000000000000035 [ 0.030153] 7b40: ffff000008f79000 ffff000008c4cd88 ffff80003d847bf0 ffff000008101778 [ 0.030402] 7b60: 0000000000000030 0000000000000000 ffff000008e97000 00000000024000c0 [ 0.030647] 7b80: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 [ 0.030895] 7ba0: 0000000000000035 ffff80003d870000 000000000000017f 0000000000000000 [ 0.031144] 7bc0: 0000000000000000 0000000000000005 ffff000008f79c84 6120757063726570 [ 0.031394] 7be0: 6f697461636f6c6c ffff80003d847a40 0000000000000042 0000000000000006 [ 0.031643] 7c00: 0000000000000041 ffff000008f79c4d ffff000088f79c3f 0000000000000006 [ 0.031877] 7c20: 00000000deadbeef 0000000000000a3f [ 0.032051] [<ffff00000818e678>] pcpu_alloc+0x88/0x6c0 [ 0.032229] [<ffff00000818ece8>] __alloc_percpu+0x18/0x20 [ 0.032409] [<ffff000008d9606c>] xen_guest_init+0x174/0x2f4 [ 0.032591] [<ffff0000080830f8>] do_one_initcall+0x38/0x130 [ 0.032783] [<ffff000008d90c34>] kernel_init_freeable+0xe0/0x248 [ 0.032995] [<ffff00000899a890>] kernel_init+0x10/0x100 [ 0.033172] [<ffff000008082ec0>] ret_from_fork+0x10/0x50 Reported-by: Wei Chen <wei.chen@arm.com> Link: https://lkml.org/lkml/2016/11/28/669 Signed-off-by: Julien Grall <julien.grall@arm.com> Signed-off-by: Stefano Stabellini <sstabellini@kernel.org> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Cc: stable@vger.kernel.org
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