- Nov 01, 2016
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Jagan Teki authored
i.CoreM6 DualLite/Solo modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DL, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Jagan Teki authored
i.CoreM6 Quad/Dual modules are system on module solutions manufactured by Engicam with following characteristics: CPU NXP i.MX6 DQ, 800MHz RAM 1GB, 32, 64 bit, DDR3-800/1066 NAND SLC,512MB Power supply Single 5V MAX LCD RES FULLHD and more info at http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Peter Chen authored
With commit 851ce932 ("usb: chipidea: otg: don't wait vbus drops below BSV when starts host"), the driver can support enabling vbus output without software control, so this board (control vbus output through ID pin) can support dual-role now. Signed-off-by:
Peter Chen <peter.chen@nxp.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- Oct 24, 2016
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Marcin Niestroj authored
liteBoard is a development board which uses liteSOM as its base. Hardware specification: * liteSOM (i.MX6UL, DRAM, eMMC) * Ethernet PHY (id 0) * USB host (usb_otg1) * MicroSD slot (uSDHC1) Signed-off-by:
Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Marcin Niestroj authored
This is a SOM (System on Module), so it will be part of another boards. Hence, this is a "dtsi" file that will be included from another device tree files. Hardware specification: * Freescale i.MX6UL SoC * up to 512 MB RAM * eMMC on uSDHC2 Signed-off-by:
Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Marek Vasut authored
Enable PWM1, otherwise the backlight cannot work. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Andreas Färber authored
Add initial device trees for UDOO Neo Basic, Extended and Full boards: * Serial console is enabled, other serial ports are prepared. * I2C based PMIC is enabled. * Ethernet is enabled for Basic and Full. * SDHC is enabled, with the SDIO_PWR GPIO modeled as a regulator. * Both user LEDs are enabled, with the orange one reserved for the M4 and with the SD card as default trigger for the red LED. The decision on a board compatible string is deferred to later. Cc: Ettore Chimenti <ettore.chimenti@udoo.org> Signed-off-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Hongtao Jia authored
Also add nodes and properties for thermal management support. Signed-off-by:
Jia Hongtao <hongtao.jia@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Sanchayan Maity authored
Enable DMA for DSPI on Vybrid. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Marek Vasut authored
The LCDIF interrupt should be triggered by the rising edge of the IRQ line because we only want the interrupt to trigger once per each frame. It seems the LCDIF IRQ line cannot be explicitly de-asserted by software, so the previous behavior before this patch, where the interrupt was triggered by level-high status of the IRQ line, caused the interrupt to fire again immediatelly after it was handled, which caused the system to lock up due to the high rate of interrupts. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Andrey Smirnov authored
Add node corresponding to OCOTP IP block. Signed-off-by:
Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Andrey Smirnov authored
I2C3 bus was only brought out in revision A1 of the board and revision B1 only brings out 3 I2C busses (I2C0, I2C1 and I2C2). Signed-off-by:
Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Jagan Teki authored
Fixed error in trailing whitespace in wandboard-rev1 dtsi. Signed-off-by:
Jagan Teki <jteki@openedev.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Jagan Teki authored
Fixed code indent tabs in respetcive imx6qdl dtsi files. Signed-off-by:
Jagan Teki <jteki@openedev.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Jagan Teki authored
Fixed no space before tabs warnings in respetcive imx6qdl dtsi files. Signed-off-by:
Jagan Teki <jteki@openedev.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- Oct 23, 2016
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Jaret Cantu authored
Calibrate the USB PHY TX settings to pass the eye diagram signal integrity test. The settings are taken from the i.MX6 reference manual's recommended configuration for USB certification (66.2.6). Signed-off-by:
Jaret Cantu <jaret.cantu@timesys.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- Oct 22, 2016
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Sanchayan Maity authored
Use enable-gpios property of PWM backlight driver for backlight control. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Sanchayan Maity authored
Remove use of pwm-leds and use the standard /sys/class/pwm interface from PWM subsystem. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Acked-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Sanchayan Maity authored
Add support for Toradex Colibri iMX6 module. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Acked-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- Oct 03, 2016
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Vladimir Zapolskiy authored
The change adds a new device node with description of generic SRAM on-chip memory found on NXP LPC32xx SoC series and connected to AHB matrix slave port 3. Note that NXP LPC3220 SoC has 128KiB of SRAM memory, the other LPC3230, LPC3240 and LPC3250 SoCs all have 256KiB SRAM space, in the shared DTSI file this change specifies 128KiB SRAM size. Also it's worth to mention that the SRAM area contains of 64KiB banks, 2 banks on LPC3220 and 4 banks on the other SoCs from the series, and all SRAM banks but the first one have independent power controls, the description of this feature will be added with the introduction of power domains for the SoC series. Signed-off-by:
Vladimir Zapolskiy <vz@mleia.com> Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- Sep 29, 2016
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Jisheng Zhang authored
This patch fixes the following DTC warning with W=1: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
This patch fixes the following DTC warning with W=1: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
This patch fixes the following DTC warning with W=1: "Node /memory has a reg or ranges property, but no unit name" Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
This patch fixes the following DTC warning with W=1: "Node /soc has a reg or ranges property, but no unit name" Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
This patch fixes the following DTC warning with W=1: "Node /soc has a reg or ranges property, but no unit name" Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
This patch fixes the following DTC warning with W=1: "Node /soc has a reg or ranges property, but no unit name" Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
As noted in [1], "there are a number of problems with skeleton.dtsi, and it would be prefereable to remove it entirely." This patch is to remove skeleton.dtsi inclusion from berlin2. [1] http://www.spinics.net/lists/arm-kernel/msg528080.html Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
As noted in [1], "there are a number of problems with skeleton.dtsi, and it would be prefereable to remove it entirely." This patch is to remove skeleton.dtsi inclusion from berlin2cd. [1] http://www.spinics.net/lists/arm-kernel/msg528080.html Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
As noted in [1], "there are a number of problems with skeleton.dtsi, and it would be prefereable to remove it entirely." This patch is to remove skeleton.dtsi inclusion from berlin2q. [1] http://www.spinics.net/lists/arm-kernel/msg528080.html Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
After commit f29a72c2 ("watchdog: dw_wdt: Convert to use watchdog infrastructure"), the dw_wdt driver can support multiple variants, so unconditionally enable all dw_wdt nodes now. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Jisheng Zhang authored
After commit f29a72c2 ("watchdog: dw_wdt: Convert to use watchdog infrastructure"), the dw_wdt driver can support multiple variants, so unconditionally enable all dw_wdt nodes now. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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- Sep 27, 2016
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Wei Ni authored
Enable throttle function for SOC_THERM. Set "hot" trips for cpu and gpu thermal zones, which can trigger the SOC_THERM hardware throttle. Signed-off-by:
Wei Ni <wni@nvidia.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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Wei Ni authored
Set general "critical" trip temperatures for cpu, gpu, mem and pllx thermal zones for all Tegra124 platform, these trips can trigger shut down or reset. Tegra124 Jetson TK1 was already set "critical" trips before, so it can overwrite the general values. Signed-off-by:
Wei Ni <wni@nvidia.com> Signed-off-by:
Zhang Rui <rui.zhang@intel.com>
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Hans de Goede authored
Use the new sun7i-a20-mmc compatible for the mmc controllers on sun7i and newer. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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- Sep 21, 2016
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Alexandre TORGUE authored
Originally-from: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by:
Alexandre TORGUE <alexandre.torgue@st.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Daniel Thompson <daniel.thompson@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: arnd@arndb.de Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: bruherrera@gmail.com Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: lee.jones@linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1474387259-18926-5-git-send-email-alexandre.torgue@st.com Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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Hans de Goede authored
Add a dt node describing the mma7660 accelerometer on the polaroid-mid2407pxe03 tablet. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Icenowy Zheng authored
UART1 is connected to the bluetooth part of RTL8723BS WiFi/BT combo card on iNet D978 Rev2 board. Enable the UART1 to make it possible to use the modified hciattach by Realtek to drive the BT part of RTL8723BS. On the board no r_uart pins are found now (the onboard RX/TX pins are wired to PF2/PF4, which is muxed with mmc0), so also disabled it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Icenowy Zheng authored
The UART1 at PG (PG6, PG7, PG8, PG9) is, in the Allwinner's reference tablet design of A23/33, used to connect to UART Bluetooth cards. Add the pinmux for it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Jorik Jonker authored
These peripherals can only be muxed to these pins, so they are associated in the DTSI instead of the board files. This makes it very easy to enable them using overlays or u-boot commands: => fdt set /soc/i2c@01c2ac00 status okay Signed-off-by:
Jorik Jonker <jorik@kippendief.biz> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Jorik Jonker authored
These are the only possible pins for these peripherals according to the datasheet. Signed-off-by:
Jorik Jonker <jorik@kippendief.biz> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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