Skip to content
  1. Jul 19, 2014
  2. Jul 13, 2014
  3. Jul 12, 2014
  4. Jul 09, 2014
  5. Jul 08, 2014
    • Olof Johansson's avatar
      Merge tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc · 3ae22f4d
      Olof Johansson authored
      Merge "Berlin SoC changes for v3.17" from Sebastian Hesselbarth:
      
      - SMP support for BG2 and BG2Q
      
      * tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin
      
      :
        ARM: berlin: add SMP support
      
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      3ae22f4d
    • Olof Johansson's avatar
      Merge tag 'mvebu-soc-3.17' of git://git.infradead.org/linux-mvebu into next/soc · b3c20e98
      Olof Johansson authored
      Merge "mvebu SoC changes for v3.17" from Jason Cooper:
      
      - kirkwood
        * add setup file for netxbig LEDs (non-trivial DT binding doesn't exist yet)
      
      - mvebu
        * staticize where needed
        * add CPU hotplug for Armada XP
        * add public datasheet for Armada 370
        * don't apply thermal quirk by default
        * get SoC ID from the system controller when possible
      
      * tag 'mvebu-soc-3.17' of git://git.infradead.org/linux-mvebu
      
      :
        ARM: mvebu: Staticize mvebu_cpu_reset_init
        ARM: mvebu: Staticize armada_370_xp_cpu_pm_init
        ARM: mvebu: Staticize armada_375_smp_cpu1_enable_wa
        ARM: mvebu: Use system controller to get the soc id when possible
        ARM: mvebu: Use the a standard errno in mvebu_get_soc_id
        ARM: mvebu: Don't apply the thermal quirk if the SoC revision is unknown
        Documentation: arm: add URLs to public datasheets for the Marvell Armada 370 SoC
        ARM: mvebu: implement CPU hotplug support for Armada XP
        ARM: mvebu: export PMSU idle enter/exit functions
        ARM: mvebu: slightly refactor/rename PMSU idle related functions
        ARM: mvebu: remove stub implementation of CPU hotplug on Armada 375/38x
        ARM: Kirkwood: Add setup file for netxbig LEDs
        ARM: mvebu: mark armada_370_xp_pmsu_idle_prepare() as static
      
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      b3c20e98
    • Olof Johansson's avatar
      Merge tag 'renesas-soc-for-v3.17' of... · 98abaf13
      Olof Johansson authored
      Merge tag 'renesas-soc-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
      
      Merge "Renesas ARM Based SoC Updates for v3.17" from Simon Horman:
      
      - Use shmobile_init_late on r8a7791 and r8a7790 whien booting using DT-only
      - Support Core-Standby for Suspend to RAM on r8a7791 and r8a7790 SoCs
      - Shared CMA reservation for R-Car Gen2 SoCs
      - Add r8a7791 SYSC power management support
      
      * tag 'renesas-soc-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas
      
      :
        ARM: shmobile: Remove ARCH_HAS_CPUFREQ config for shmobile
        ARM: shmobile: rcar-gen2: update call to dma_contiguous_reserve_area
        ARM: shmobile: rcar-gen2: correct return value of shmobile_smp_apmu_suspend_init
        ARM: shmobile: rcar-gen2: Remove useless copied section for LongTrail
        ARM: shmobile: rcar-gen2: Use "1ULL" instead of "(u64)1"
        ARM: shmobile: rcar-gen2: Update for of_get_flat_dt_prop() update
        ARM: shmobile: Add shared R-Car Gen2 CMA reservation code
        ARM: shmobile: Use shmobile_init_late() on r8a7791 DT-only
        ARM: shmobile: Use shmobile_init_late() on r8a7790 DT-only
        ARM: shmobile: Mark all SoCs in shmobile as CPUFreq, capable
        ARM: shmobile: r8a7791: Support Core-Standby for Suspend to RAM
        ARM: shmobile: r8a7790: Support Core-Standby for Suspend to RAM
        ARM: shmobile: APMU: Add Core-Standby-state for Suspend to RAM
        ARM: shmobile: r8a7791 SYSC setup code
      
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      98abaf13
    • Olof Johansson's avatar
      Merge tag 'versatile-for-3.17' of... · 12af7011
      Olof Johansson authored
      Merge tag 'versatile-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into next/soc
      
      Merge "DT IRQ and clock support for Versatile platforms" from Rob Herring.
      
      This branch moves IRQ and clock support over to DT for the versatile
      platforms.
      
      * tag 'versatile-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
      
      :
        clk: versatile: add versatile OSC support
        dts: versatile: add clock tree
        ARM: timer-sp: allow getting timer1 clock from DT to fallback to legacy clock
        dt/bindings: add compatible string for versatile osc clock
        dt/bindings: arm-boards: add binding for Versatile core module
        dts: versatile: add pl180 compatible strings
        ARM: versatile: remove init_irq hook for DT boot
        ARM: integrator: convert to use irqchip_init
        irqchip: versatile-fpga: add support for arm,versatile-sic
        irqchip: versatile-fpga: Add IRQCHIP_DECLARE support
        dts: versatile: add missing irq controller properties
      
      Tested-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Acked-by: default avatarJason Cooper <jason@lakedaemon.net>
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      12af7011
  6. Jul 07, 2014
  7. Jul 06, 2014
  8. Jul 01, 2014
  9. Jun 30, 2014
  10. Jun 29, 2014
    • Will Deacon's avatar
      ARM: 8087/1: ptrace: reload syscall number after secure_computing() check · 42309ab4
      Will Deacon authored
      
      
      On the syscall tracing path, we call out to secure_computing() to allow
      seccomp to check the syscall number being attempted. As part of this, a
      SIGTRAP may be sent to the tracer and the syscall could be re-written by
      a subsequent SET_SYSCALL ptrace request. Unfortunately, this new syscall
      is ignored by the current code unless TIF_SYSCALL_TRACE is also set on
      the current thread.
      
      This patch slightly reworks the enter path of the syscall tracing code
      so that we always reload the syscall number from
      current_thread_info()->syscall after the potential ptrace traps.
      
      Acked-by: default avatarKees Cook <keescook@chromium.org>
      Tested-by: default avatarKees Cook <keescook@chromium.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      42309ab4
    • Laura Abbott's avatar
      ARM: 8086/1: Set memblock limit for nommu · 6980c3e2
      Laura Abbott authored
      Commit 1c2f87c2
      
       (ARM: 8025/1: Get rid of meminfo) changed find_limits
      to use memblock_get_current_limit for calculating the max_low pfn.
      nommu targets never actually set a limit on memblock though which
      means memblock_get_current_limit will just return the default
      value. Set the memblock_limit to be the end of DDR to make sure
      bounds are calculated correctly.
      
      Signed-off-by: default avatarLaura Abbott <lauraa@codeaurora.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      6980c3e2
    • Andrea Adami's avatar
      ARM: 8085/1: sa1100: collie: add top boot mtd partition · 3abe7423
      Andrea Adami authored
      
      
      The CFI mapping is now perfect so we can expose the top block, read only.
      There isn't much to read, though, just the sharpsl_params values.
      
      Signed-off-by: default avatarAndrea Adami <andrea.adami@gmail.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      3abe7423
    • Andrea Adami's avatar
      ARM: 8084/1: sa1100: collie: revert back to cfi_probe · 92183103
      Andrea Adami authored
      Reverts commit d26b17ed
      
      
      ARM: sa1100: collie.c: fall back to jedec_probe flash detection
      
      Unfortunately the detection was challenged on the defective unit used for tests:
      one of the NOR chips did not respond to the CFI query.
      Moreover that bad device needed extra delays on erase-suspend/resume cycles.
      
      Tested personally on 3 different units and with feedback of two other users.
      
      Signed-off-by: default avatarAndrea Adami <andrea.adami@gmail.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      92183103
    • Nicolas Pitre's avatar
      ARM: 8080/1: mcpm.h: remove unused variable declaration · d0ba7cc0
      Nicolas Pitre authored
      
      
      The sync_phys variable has been replaced by link time computation in
      mcpm_head.S before the code was submitted upstream.
      
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      d0ba7cc0
    • Thomas Petazzoni's avatar
      ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache · 98ea2dba
      Thomas Petazzoni authored
      
      
      When a PL310 cache is used on a system that provides hardware
      coherency, the outer cache sync operation is useless, and can be
      skipped. Moreover, on some systems, it is harmful as it causes
      deadlocks between the Marvell coherency mechanism, the Marvell PCIe
      controller and the Cortex-A9.
      
      To avoid this, this commit introduces a new Device Tree property
      'arm,io-coherent' for the L2 cache controller node, valid only for the
      PL310 cache. It identifies the usage of the PL310 cache in an I/O
      coherent configuration. Internally, it makes the driver disable the
      outer cache sync operation.
      
      Note that technically speaking, a fully coherent system wouldn't
      require any of the other .outer_cache operations. However, in
      practice, when booting secondary CPUs, these are not yet coherent, and
      therefore a set of cache maintenance operations are necessary at this
      point. This explains why we keep the other .outer_cache operations and
      only ->sync is disabled.
      
      While in theory any write to a PL310 register could cause the
      deadlock, in practice, disabling ->sync is sufficient to workaround
      the deadlock, since the other cache maintenance operations are only
      used in very specific situations.
      
      Contrary to previous versions of this patch, this new version does not
      simply NULL-ify the ->sync member, because the l2c_init_data
      structures are now 'const' and therefore cannot be modified, which is
      a good thing. Therefore, this patch introduces a separate
      l2c_init_data instance, called of_l2c310_coherent_data.
      
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      98ea2dba
    • Linus Torvalds's avatar
      Merge tag 'spi-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi · 24b414d5
      Linus Torvalds authored
      Pull spi fixes from Mark Brown:
       "A few driver specific fixes, the biggest one being a fix for the newly
        added Qualcomm SPI controller driver to make it not use its internal
        chip select due to hardware bugs, replacing it with GPIOs"
      
      * tag 'spi-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
        spi: qup: Remove chip select function
        spi: qup: Fix order of spi_register_master
        spi: sh-sci: fix use-after-free in sh_sci_spi_remove()
        spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI
      24b414d5
    • Linus Torvalds's avatar
      Merge tag 'regulator-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator · 4194976b
      Linus Torvalds authored
      Pull regulator fixes from Mark Brown:
       "Several driver specific fixes here, the palmas fixes being especially
        important for a range of boards - the recent updates to support new
        devices have introduced several regressions"
      
      * tag 'regulator-v3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
        regulator: tps65218: Correct the the config register for LDO1
        regulator: tps65218: Add the missing of_node assignment in probe
        regulator: palmas: fix typo in enable_reg calculation
        regulator: bcm590xx: fix vbus name
        regulator: palmas: Fix SMPS enable/disable/is_enabled
      4194976b
    • Linus Torvalds's avatar
      Merge git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending · eb477e03
      Linus Torvalds authored
      Pull SCSI target fixes from Nicholas Bellinger:
       "Mostly minor fixes this time around.  The highlights include:
      
         - iscsi-target CHAP authentication fixes to enforce explicit key
           values (Tejas Vaykole + rahul.rane)
         - fix a long-standing OOPs in target-core when a alua configfs
           attribute is accessed after port symlink has been removed.
           (Sebastian Herbszt)
         - fix a v3.10.y iscsi-target regression causing the login reject
           status class/detail to be ignored (Christoph Vu-Brugier)
         - fix a v3.10.y iscsi-target regression to avoid rejecting an
           existing ITT during Data-Out when data-direction is wrong (Santosh
           Kulkarni + Arshad Hussain)
         - fix a iscsi-target related shutdown deadlock on UP kernels (Mikulas
           Patocka)
         - fix a v3.16-rc1 build issue with vhost-scsi + !CONFIG_NET (MST)"
      
      * git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
        iscsi-target: fix iscsit_del_np deadlock on unload
        iovec: move memcpy_from/toiovecend to lib/iovec.c
        iscsi-target: Avoid rejecting incorrect ITT for Data-Out
        tcm_loop: Fix memory leak in tcm_loop_submission_work error path
        iscsi-target: Explicily clear login response PDU in exception path
        target: Fix left-over se_lun->lun_sep pointer OOPs
        iscsi-target; Enforce 1024 byte maximum for CHAP_C key value
        iscsi-target: Convert chap_server_compute_md5 to use kstrtoul
      eb477e03