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  1. Sep 14, 2016
    • Tony Lindgren's avatar
      ARM: dts: Configure omap5 OTG ID pin · 952a5db0
      Tony Lindgren authored
      
      
      The ID pin GPIO comes from the PMIC. Let's configure it as a GPIO
      for the driver to use, and also make sure the PMIC GPIO pin muxing
      is correct. The PMIC pad1 and 2 values for omap5-uevm and igepv5 are
      0x5a and 0x1b, we only need to clear bit 2 in pad1 register to make
      the ID pin GPIO work.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      952a5db0
    • Tony Lindgren's avatar
      ARM: dts: ARM: dts: Fix omap5 SDIO dat1 interrupt · 08f9268b
      Tony Lindgren authored
      
      
      Few changes to fix issues I've noticed while debugging omap5-uevm
      wl18xx issues:
      
      1. Move wlcore irq pin muxing under wlcore. This irq could be
         different from gpio_wk14 on some board variants
      
      2. Don't configure pull on wlcore irq pin. There is a 10k
         pull up resistor R105 on the device to VDDS_1v8_MAIN
      
      3. The padconf register for wlsdio_data1 is wrong, it's really
         at 0x1a8 + 2 - 0x40 = 0x16a offset, not at 0x168 as that's
         for wlsdio_data0
      
      4. Mark the omap5-uevm wlan as compatible with ti,wl1837 as
         that's what the TDK R078 part seems to be
      
      5. The MMC interrupt for WLAN musb be wakeupgen, not gic
      
      Looks like omap5-uevm WLAN behaves better now, but I still seem
      to have issues with some access points.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      08f9268b
    • Tony Lindgren's avatar
      ARM: dts: Configure panda SDIO WLAN wakeirq · 84ae4974
      Tony Lindgren authored
      
      
      Otherwise we have delays on noticing interrupts from the
      WLAN card when idle.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      84ae4974
  2. Aug 31, 2016
  3. Aug 30, 2016
  4. Aug 26, 2016