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  1. Mar 23, 2020
    • Chris Wilson's avatar
      drm/i915/gt: Mark timeline->cacheline as destroyed after rcu grace period · 8e87e013
      Chris Wilson authored
      
      
      Since we take advantage of RCU for some i915_active objects, like the
      intel_timeline_cacheline, we need to delay the i915_active_fini until
      after the RCU grace period and we perform the kfree -- that is until
      after all RCU protected readers.
      
      <3> [108.204873] ODEBUG: assert_init not available (active state 0) object type: i915_active hint: __cacheline_active+0x0/0x80 [i915]
      <4> [108.207377] WARNING: CPU: 3 PID: 2342 at lib/debugobjects.c:488 debug_print_object+0x67/0x90
      <4> [108.207400] Modules linked in: vgem snd_hda_codec_hdmi x86_pkg_temp_thermal coretemp crct10dif_pclmul crc32_pclmul snd_hda_intel ghash_clmulni_intel snd_intel_dspcfg snd_hda_codec ax88179_178a snd_hwdep usbnet btusb snd_hda_core btrtl mii btbcm btintel snd_pcm bluetooth ecdh_generic ecc i915 i2c_hid pinctrl_sunrisepoint pinctrl_intel intel_lpss_pci prime_numbers
      <4> [108.207587] CPU: 3 PID: 2342 Comm: gem_exec_parall Tainted: G     U            5.6.0-rc6-CI-Patchwork_17047+ #1
      <4> [108.207609] Hardware name: Google Soraka/Soraka, BIOS MrChromebox-4.10 08/25/2019
      <4> [108.207639] RIP: 0010:debug_print_object+0x67/0x90
      <4> [108.207668] Code: 83 c2 01 8b 4b 14 4c 8b 45 00 89 15 87 d2 8a 02 8b 53 10 4c 89 e6 48 c7 c7 38 2b 32 82 48 8b 14 d5 80 2f 07 82 e8 49 d5 b7 ff <0f> 0b 5b 83 05 c3 f6 22 01 01 5d 41 5c c3 83 05 b8 f6 22 01 01 c3
      <4> [108.207692] RSP: 0018:ffffc90000e7f890 EFLAGS: 00010282
      <4> [108.207723] RAX: 0000000000000000 RBX: ffffc90000e7f8b0 RCX: 0000000000000001
      <4> [108.207747] RDX: 0000000080000001 RSI: ffff88817ada8cb8 RDI: 00000000ffffffff
      <4> [108.207770] RBP: ffffffffa0341cc0 R08: ffff88816b5a8948 R09: 0000000000000000
      <4> [108.207792] R10: 0000000000000000 R11: 0000000000000000 R12: ffffffff82322d54
      <4> [108.207814] R13: ffffffffa0341cc0 R14: ffffffff83df9568 R15: ffff88816064f400
      <4> [108.207839] FS:  00007f437d753700(0000) GS:ffff88817ad80000(0000) knlGS:0000000000000000
      <4> [108.207863] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      <4> [108.207887] CR2: 00007f2ad1fb5000 CR3: 00000001725d8004 CR4: 00000000003606e0
      <4> [108.207907] Call Trace:
      <4> [108.207959]  debug_object_assert_init+0x15c/0x180
      <4> [108.208475]  ? i915_active_acquire_if_busy+0x10/0x50 [i915]
      <4> [108.208513]  ? rcu_read_lock_held+0x4d/0x60
      <4> [108.208970]  i915_active_acquire_if_busy+0x10/0x50 [i915]
      <4> [108.209380]  intel_timeline_read_hwsp+0x81/0x540 [i915]
      <4> [108.210262]  __emit_semaphore_wait+0x45/0x1b0 [i915]
      <4> [108.210726]  ? i915_request_await_dma_fence+0x143/0x560 [i915]
      <4> [108.211156]  i915_request_await_dma_fence+0x28a/0x560 [i915]
      <4> [108.211633]  i915_request_await_object+0x24a/0x3f0 [i915]
      <4> [108.212102]  eb_submit.isra.47+0x58f/0x920 [i915]
      <4> [108.212622]  i915_gem_do_execbuffer+0x1706/0x2c70 [i915]
      <4> [108.213071]  ? i915_gem_execbuffer2_ioctl+0xc0/0x470 [i915]
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200323092841.22240-1-chris@chris-wilson.co.uk
      8e87e013
    • Anshuman Gupta's avatar
      drm/i915/edp: Ignore short pulse when panel powered off · 13ea6db2
      Anshuman Gupta authored
      
      
      Few edp panels like Sharp is triggering short and long
      hpd pulse after panel is getting powered off.
      Currently driver is already ignoring long pulse for eDP
      panel but in order to process the short pulse, it turns on
      the VDD which requires panel power_cycle_delay + panel_power_on_delay
      these delay on Sharp panel introduced the responsiveness overhead
      of 800ms in the modeset sequence and as well is in suspend
      sequence.
      Ignoring any short pulse if panel is powered off.
      
      FIXME: It requires to wait for panel_power_off delay in order
      to check the panel power status due to pps_lock because panel triggers
      short pulse immediately after writing PP_OFF to PP_CTRL register and
      wait_panel_off waits for panel_power_off delay with pps_lock held.
      This still creates responsiveness overhead of panel_power_off delay.
      
      v2:
      - checking vdd along with panel power to ignore the hpd. [Jani,Ville]
      v3:
      - safer side check to ignore the long hpd when eDP have power,
        adding type of hpd to debug log. [Jani]
      
      Signed-off-by: default avatarAnshuman Gupta <anshuman.gupta@intel.com>
      Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
      Signed-off-by: default avatarUma Shankar <uma.shankar@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200318081837.23983-1-anshuman.gupta@intel.com
      13ea6db2
    • Chris Wilson's avatar
      drm/i915/gt: Leave rps->cur_freq on unpark · 043cd2d1
      Chris Wilson authored
      
      
      Don't override our previous frequency we used after parking, and avoid
      continually spiking back to the efficient frequency for mostly idle
      workloads. Trust our ability to autotune across a workload switch.
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Andi Shyti <andi.shyti@intel.com>
      Cc: Lyude Paul <lyude@redhat.com>
      Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200322163225.28791-2-chris@chris-wilson.co.uk
      043cd2d1
    • Chris Wilson's avatar
      drm/i915/gt: Treat idling as a RPS downclock event · 21abf0bf
      Chris Wilson authored
      If we park/unpark faster than we can respond to RPS events, we never
      will process a downclock event after expiring a waitboost, and thus we
      will forever restart the GPU at max clocks even if the workload switches
      and doesn't justify full power.
      
      Closes: https://gitlab.freedesktop.org/drm/intel/issues/1500
      
      
      Fixes: 3e7abf81 ("drm/i915: Extract GT render power state management")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Andi Shyti <andi.shyti@intel.com>
      Cc: Lyude Paul <lyude@redhat.com>
      Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20200322163225.28791-1-chris@chris-wilson.co.uk
      Cc: <stable@vger.kernel.org> # v5.5+
      21abf0bf
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