- Nov 20, 2012
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Christian Daudt authored
In order to start upstreaming Broadcom SoC support, create a starting hierarchy, arch and dts files. The first support SoC family that is planned is the BCM281XX (BCM11130/11140/11351/28145/28155) family of dual A9 mobile SoC cores. This code is just the skeleton code for get the machine upstreamed. It has been made MULTIPLATFORM compatible. Next steps ---------- Upstream a basic set of drivers - sufficient for a console boot to ramdisk. These will includer timer, gpio, i2c drivers. After this basic set, we will proceed with a more comprehensive set of drivers for the 281XX SoC family. v2 patch mods -------- - Remove l2x0_of_init call as there were problems with the code. A separate patch will be submitted with cache init code - Rename capri files and refs to bcm281xx-based names - Add bcm281xx binding doc - various misc cleanups v3 patch mods ------------- - Remove extra #include lines - Remove remaining references to capri - dt uart chipset string added - cleaned up chip # references v4 patch mods ------------- - swap order of compatible definitions for uart - fix typo v5 patch mods ------------- - Rename bcm281xx to bcm11351 in dts+code, leaving references to bcm281xx only in help+comments. v6 patch mods ------------- - fix typo in uart 'compatible' string Signed-off-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Nov 16, 2012
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Sascha Hauer authored
The babbage board has a DVI-I output which allows to output analog and digital signals simultaneously. This patch adds support for it to the devicetree. The DDC signals are not wired up on the board, so DRM will fall back on default VESA modes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
This adds the IPU devices to the devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
This adds the IPU device to the devicetree along with the necessary pinctrl settings for the parallel display outputs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
This adds the IPU device to the devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
The i.MX5 clk support has platform based clock bindings for the IPU. IPU support is devicetree only, so move them over to devicetree based bindings. Also, enable MIPI clocks which do not have a device associated with, but still need to be enabled to do graphics on i.MX51. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Steffen Trumtrar authored
This adds the mmdc_ch1 as a possible parent for the ldb_di clk. According to the datasheet, this clock can be selected at this mux. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
The MIPI interface has to be initialized for proper IPU support. The MIPI officially is not supported, but still needs initialization. This patch adds this to the SoC startup as all it does is poking some magic values into registers for which we do not have documentation. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
During the clock conversion for mx27 the "per4_gate" clock was missed to get registered as a dependency of mx2-camera driver. In the old mx27 clock driver we used to have: DEFINE_CLOCK1(csi_clk, 0, NULL, 0, parent, &csi_clk1, &per4_clk); ,so does the same in the new clock driver Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
The i.MX27 clock tree can either be driven from a 26MHz oscillator or from a 32768Hz oscillator. The latter was not properly implemented, the mux between these two pathes was missing. Add this mux and while at it rename the 'prem' (premultiplier) clk to 'fpm' (Frequency Pre-Multiplier) to better match the datasheet. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fabio Estevam authored
imx27.dtsi already register the watchdog, so no need to do it in the board dts file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Roland Stigge authored
This patch fixes watchdog support after devicetree switch for imx53 Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Roland Stigge authored
This patch enables support for i.MX53 in addition to i.MX25 by providing a dummy clock on i.MX53 since this one doesn't have a separate clock for internal RTC but the driver requests one. Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Gaëtan Carlier authored
This is to prepare addition of m2m-emmapp driver otherwise IMX_HAVE_PLATFORM_MX2_CAMERA must be declared even if only Post-Processor is needed. IMX_HAVE_PLATFORM_MX2_EMMA define has been added. Changes since v1: - Add "select IMX_HAVE_PLATFORM_MX2_EMMA" for MACH_IMX27_VISSTRIM_M10 platform due to pending patch in linux-media tree that will call imx27_add_mx2_emmaprp(). Signed-off-by: Gaëtan Carlier <gcembed@gmail.com> Acked-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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- Nov 12, 2012
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Alban Bedel authored
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- Nov 09, 2012
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Stefano Stabellini authored
The commit 911dec0d "xen/arm: Fix compile errors when drivers are compiled as modules." exports the neccessary functions. But to guard ourselves against out-of-tree modules and future drivers hitting this, lets export all of the relevant hypercalls. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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- Nov 08, 2012
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Kuninori Morimoto authored
xcka/xckb were required from FSI driver Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
xcka/xckb were required from FSI driver Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
Now, sh7372 can use sh_clk_fsidiv_register() for FSI-DIV clocks. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
Not only sh7372 but also many Renesas chip has FSI-DIV clock, and we can share its sh_clk_ops. To support common FSI-DIV clock, sh7372_fsidivX_clk becomes non-global by this patch. This is preparation for FSI DT support. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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- Nov 07, 2012
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Konrad Rzeszutek Wilk authored
We end up with: ERROR: "HYPERVISOR_event_channel_op" [drivers/xen/xen-gntdev.ko] undefined! ERROR: "privcmd_call" [drivers/xen/xen-privcmd.ko] undefined! ERROR: "HYPERVISOR_grant_table_op" [drivers/net/xen-netback/xen-netback.ko] undefined! and this patch exports said function (which is implemented in hypercall.S). Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Ian Campbell <ian.campbell@citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Roland Stigge authored
This patch removes the IRQ mask initialization which is already done some lines above. This was actually a bug: The init was supposed to set the bits for the (chained) SUB IRQs. But this is already fixed by the previous patch, doing this implicitely via irq_set_chained_handler(). Signed-off-by: Roland Stigge <stigge@antcom.de>
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Roland Stigge authored
This patch fixes the issue of an access to a yet uninitialized data structure at the point where irq_set_chained_handler() was called by moving the respective calls to the end of lpc32xx_init_irq(). The call path was: irq_set_chained_handler() -> __irq_set_handler() -> irq_startup() -> irq_enable() -> desc->irq_data.chip->irq_unmask() at which point lpc32xx_unmask_irq() effectively read desc->irq_data.hwirq which was only later initialized. Signed-off-by: Roland Stigge <stigge@antcom.de>
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Roland Stigge authored
This patch removes the call to irq_alloc_descs() which always returns an error since the descriptors are always preallocated already. Signed-off-by: Roland Stigge <stigge@antcom.de>
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Kuninori Morimoto authored
ohci-platform driver require these clocks Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
ehci-platform driver require these clocks Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
USBCKCR is controlling USB parent clock and divide rate. This parent clock is used as a "usb24s" from other devices, but the "divide rate" is not used. Further, this clock itself is known as "usb24". So, to set this clock is a little confusable. This patch adds quick explain and sample settings for this clock. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
PENCx is Power Enable Control pin for USB. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Arnd Bergmann authored
0336517b "ARM: smp_twd: don't warn on no DT node" introduced a silly build warning by returning an error from a void function. This keeps the intention of that patch but fixes the warning by removing the error code Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Olof Johansson authored
Fixes build error due to multiple includes: In file included from arch/arm/mach-highbank/sysregs.h:23:0, from arch/arm/mach-highbank/system.c:20: arch/arm/mach-highbank/core.h:8:91: error: redefinition of 'highbank_lluart_map_io' In file included from arch/arm/mach-highbank/system.c:19:0: arch/arm/mach-highbank/core.h:8:91: note: previous definition of 'highbank_lluart_map_io' was here Signed-off-by: Olof Johansson <olof@lixom.net>
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- Nov 06, 2012
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Nobuhiro Iwamatsu authored
This patch enables PMU for r8a7740. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> [horms@verge.net.au: corrected indentation] Signed-off-by: Simon Horman <horms@verge.net.au>
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Bastian Hecht authored
SH7372 can use DMA with the FLCTL flash controller. Add required slave IDs and slave descriptors. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
This patch enable R-Car I2C driver Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
This patch is required from R-Car I2C driver Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Kuninori Morimoto authored
r8a7740 machine desc name should be R8A7740, not SH7372 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Bastian Hecht authored
We can remove the extra code of modify_scu_cpu_psr() and use the cleaner generic ARM helper scu_power_mode(). As every CPU only deals with its own power register and scu_power_mode() operates with 8-bit accesses, we save the locking overhead too. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Bastian Hecht authored
We can remove the extra code of modify_scu_cpu_psr() and use the cleaner generic ARM helper scu_power_mode(). As every CPU only deals with its own power register and scu_power_mode() operates with 8-bit accesses, we save the locking overhead too. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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Bastian Hecht authored
We can remove the extra code of modify_scu_cpu_psr() and use the cleaner generic ARM helper scu_power_mode(). As every CPU only deals with its own power register and scu_power_mode() operates with 8-bit accesses, we save the locking overhead too. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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