- Oct 21, 2018
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Bjorn Helgaas authored
- Detach VMD resources after stopping root bus to prevent orphan resources (Jon Derrick) * remotes/lorenzo/pci/vmd: PCI: vmd: Detach resources after stopping root bus
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Bjorn Helgaas authored
- Fix Mediatek unchecked return value from devm_pci_remap_iospace() (Gustavo A. R. Silva) - Fix Mediatek endpoint/port matching logic (Honghui Zhang) - Change Mediatek Root Port Class Code to PCI_CLASS_BRIDGE_PCI (Honghui Zhang) - Remove redundant Mediatek PM domain check (Honghui Zhang) - Convert Mediatek to pci_host_probe() (Honghui Zhang) - Fix Mediatek MSI enablement (Honghui Zhang) - Add Mediatek system PM support for MT2712 and MT7622 (Honghui Zhang) - Add Mediatek loadable module support (Honghui Zhang) * remotes/lorenzo/pci/mediatek: PCI: mediatek: Add loadable kernel module support PCI: mediatek: Add system PM support for MT2712 and MT7622 PCI: mediatek: Fixup MSI enablement logic by enabling MSI before clocks PCI: mediatek: Convert to use pci_host_probe() PCI: mediatek: Remove the redundant dev->pm_domain check PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCI PCI: mediatek: Fix mtk_pcie_find_port() endpoint/port matching logic PCI: mediatek: Fix unchecked return value
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Bjorn Helgaas authored
- Quirk Keystone K2G to limit MRRS to 256 (Kishon Vijay Abraham I) - Update Keystone to use MRRS quirk for host bridge instead of open coding (Kishon Vijay Abraham I) - Refactor Keystone link establishment (Kishon Vijay Abraham I) - Simplify and speed up Keystone link training (Kishon Vijay Abraham I) - Remove unused Keystone host_init argument (Kishon Vijay Abraham I) - Merge Keystone driver files into one (Kishon Vijay Abraham I) - Remove redundant Keystone platform_set_drvdata() (Kishon Vijay Abraham I) - Rename Keystone functions for uniformity (Kishon Vijay Abraham I) - Add Keystone device control module DT binding (Kishon Vijay Abraham I) - Use SYSCON API to get Keystone control module device IDs (Kishon Vijay Abraham I) - Clean up Keystone PHY handling (Kishon Vijay Abraham I) - Use runtime PM APIs to enable Keystone clock (Kishon Vijay Abraham I) - Clean up Keystone config space access checks (Kishon Vijay Abraham I) - Get Keystone outbound window count from DT (Kishon Vijay Abraham I) - Clean up Keystone outbound window configuration (Kishon Vijay Abraham I) - Clean up Keystone DBI setup (Kishon Vijay Abraham I) - Clean up Keystone ks_pcie_link_up() (Kishon Vijay Abraham I) - Fix Keystone IRQ status checking (Kishon Vijay Abraham I) - Add debug messages for all Keystone errors (Kishon Vijay Abraham I) - Clean up Keystone includes and macros (Kishon Vijay Abraham I) * remotes/lorenzo/pci/keystone: PCI: keystone: Cleanup macros defined in pci-keystone.c PCI: keystone: Reorder header file in alphabetical order PCI: keystone: Add debug error message for all errors PCI: keystone: Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get interrupt status PCI: keystone: Cleanup ks_pcie_link_up() PCI: keystone: Cleanup set_dbi_mode() and get_dbi_mode() PCI: keystone: Cleanup outbound window configuration PCI: keystone: Get number of outbound windows from DT PCI: keystone: Cleanup configuration space access PCI: keystone: Invoke runtime PM APIs to enable clock PCI: keystone: Cleanup PHY handling PCI: keystone: Use SYSCON APIs to get device ID from control module dt-bindings: PCI: keystone: Add bindings to get device control module PCI: keystone: Use uniform function naming convention PCI: keystone: Remove redundant platform_set_drvdata() invocation PCI: keystone: Merge pci-keystone-dw.c and pci-keystone.c PCI: keystone: Remove unused argument from ks_dw_pcie_host_init() PCI: keystone: Do not initiate link training multiple times PCI: keystone: Move dw_pcie_setup_rc() out of ks_pcie_establish_link() PCI: keystone: Use quirk to set MRRS for PCI host bridge PCI: keystone: Use quirk to limit MRRS for K2G
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Bjorn Helgaas authored
- Remove iproc PAXC slot check to allow VF support (Jitendra Bhivare) * remotes/lorenzo/pci/iproc: PCI: iproc: Remove PAXC slot check to allow VF support
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Bjorn Helgaas authored
- Support 100MHz/200MHz refclocks for i.MX6 (Lucas Stach) - Add initial power management for i.MX7 (Leonard Crestez) - Add PME_Turn_Off support for i.MX7 (Leonard Crestez) - Fix qcom runtime power management error handling (Bjorn Andersson) - Update TI dra7xx unaligned access errata workaround for host mode as well as endpoint mode (Vignesh R) - Fix kirin section mismatch warning (Nathan Chancellor) * remotes/lorenzo/pci/dwc: PCI: imx: Add PME_Turn_Off support ARM: dts: imx7d: Add turnoff reset dt-bindings: imx6q-pcie: Add turnoff reset for imx7d reset: imx7: Add PCIE_CTRL_APPS_TURNOFF PCI: kirin: Fix section mismatch warning PCI: dwc: pci-dra7xx: Enable errata i870 for both EP and RC mode dt-bindings: PCI: dra7xx: Add bindings for unaligned access in host mode PCI: qcom: Fix error handling in runtime PM support PCI: imx: Initial imx7d pm support PCI: imx6: Support MPLL reconfiguration for 100MHz and 200MHz refclock
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Bjorn Helgaas authored
- Remove redundant controller tests for "device_type == pci" (Rob Herring) - Document R-Car E3 (R8A77990) bindings (Tho Vu) - Add device tree support for R-Car r8a7744 (Biju Das) - Drop unused mvebu PCIe capability code (Thomas Petazzoni) - Add shared PCI bridge emulation code (Thomas Petazzoni) - Convert mvebu to use shared PCI bridge emulation (Thomas Petazzoni) - Add aardvark Root Port emulation (Thomas Petazzoni) * remotes/lorenzo/pci/controller-misc: PCI: aardvark: Implement emulated root PCI bridge config space PCI: mvebu: Convert to PCI emulated bridge config space PCI: mvebu: Drop unused PCI express capability code PCI: Introduce PCI bridge emulated config space common logic dt-bindings: PCI: rcar: Add device tree support for r8a7744 dt-bindings: PCI: rcar: Add device tree support for r8a7744 DT: pci: rcar-pci: document R8A77990 bindings PCI: Remove unnecessary check of device_type == pci
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Bjorn Helgaas authored
- Fix Cadence PHY handling during probe (Alan Douglas) - Signal Cadence Endpoint interrupts via AXI region 0 instead of last region (Alan Douglas) - Write Cadence Endpoint MSI interrupts with 32 bits of data (Alan Douglas) * remotes/lorenzo/pci/cadence: PCI: cadence: Write MSI data with 32bits PCI: cadence: Use AXI region 0 to signal interrupts from EP PCI: cadence: Correct probe behaviour when failing to get PHY
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Bjorn Helgaas authored
- Fix VMD AERSID quirk Device ID matching (Jon Derrick) * pci/host-vmd: x86/PCI: Apply VMD's AERSID fixup generically
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Bjorn Helgaas authored
- Cache VF config space size to optimize enumeration of many VFs (KarimAllah Ahmed) - Remove unnecessary <linux/pci-ats.h> include (Bjorn Helgaas) * pci/virtualization: PCI/IOV: Remove unnecessary include of <linux/pci-ats.h> PCI/IOV: Use VF0 cached config space size for other VFs
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Bjorn Helgaas authored
- Add PCI support for peer-to-peer DMA (Logan Gunthorpe) - Add sysfs group for PCI peer-to-peer memory statistics (Logan Gunthorpe) - Add PCI peer-to-peer DMA scatterlist mapping interface (Logan Gunthorpe) - Add PCI configfs/sysfs helpers for use by peer-to-peer users (Logan Gunthorpe) - Add PCI peer-to-peer DMA driver writer's documentation (Logan Gunthorpe) - Add block layer flag to indicate driver support for PCI peer-to-peer DMA (Logan Gunthorpe) - Map Infiniband scatterlists for peer-to-peer DMA if they contain P2P memory (Logan Gunthorpe) - Register nvme-pci CMB buffer as PCI peer-to-peer memory (Logan Gunthorpe) - Add nvme-pci support for PCI peer-to-peer memory in requests (Logan Gunthorpe) - Use PCI peer-to-peer memory in nvme (Stephen Bates, Steve Wise, Christoph Hellwig, Logan Gunthorpe) * pci/peer-to-peer: nvmet: Optionally use PCI P2P memory nvmet: Introduce helper functions to allocate and free request SGLs nvme-pci: Add support for P2P memory in requests nvme-pci: Use PCI p2pmem subsystem to manage the CMB IB/core: Ensure we map P2P memory correctly in rdma_rw_ctx_[init|destroy]() block: Add PCI P2P flag for request queue PCI/P2PDMA: Add P2P DMA driver writer's documentation docs-rst: Add a new directory for PCI documentation PCI/P2PDMA: Introduce configfs/sysfs enable attribute helpers PCI/P2PDMA: Add PCI p2pmem DMA mappings to adjust the bus offset PCI/P2PDMA: Add sysfs group to display p2pmem stats PCI/P2PDMA: Support peer-to-peer memory
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Bjorn Helgaas authored
- Avoid panic when drivers enable MSI/MSI-X twice (Tonghao Zhang) * pci/msi: PCI/MSI: Warn and return error if driver enables MSI/MSI-X twice
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Bjorn Helgaas authored
- Remove unused Netronome NFP32xx Device IDs (Jakub Kicinski) - Use bitmap_zalloc() for dma_alias_mask (Andy Shevchenko) - Add switch fall-through annotations (Gustavo A. R. Silva) - Remove unused Switchtec quirk variable (Joshua Abraham) - Fix pci.c kernel-doc warning (Randy Dunlap) - Remove trivial PCI wrappers for DMA APIs (Christoph Hellwig) - Add Intel GPU device IDs to spurious interrupt quirk (Bin Meng) - Run Switchtec DMA aliasing quirk only on NTB endpoints to avoid useless dmesg errors (Logan Gunthorpe) - Update Switchtec NTB documentation (Wesley Yung) - Remove redundant "default n" from Kconfig (Bartlomiej Zolnierkiewicz) * pci/misc: PCI: pcie: Remove redundant 'default n' from Kconfig NTB: switchtec_ntb: Update switchtec documentation with prerequisites for NTB PCI: Fix Switchtec DMA aliasing quirk dmesg noise PCI: Add macro for Switchtec quirk declarations PCI: Add Device IDs for Intel GPU "spurious interrupt" quirk PCI: Remove pci_set_dma_max_seg_size() PCI: Remove pci_set_dma_seg_boundary() PCI: Remove pci_unmap_addr() wrappers for DMA API PCI / ACPI: Mark expected switch fall-through PCI: Remove set but unused variable PCI: Fix pci.c kernel-doc parameter warning PCI: Allocate dma_alias_mask with bitmap_zalloc() PCI: Remove unused NFP32xx IDs
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Bjorn Helgaas authored
- Differentiate between pciehp surprise and safe removal (Lukas Wunner) - Remove unnecessary pciehp includes (Lukas Wunner) - Drop pciehp hotplug_slot_ops wrappers (Lukas Wunner) - Tolerate PCIe Slot Presence Detect being hardwired to zero to workaround broken hardware, e.g., the Wilocity switch/wireless device (Lukas Wunner) - Unify pciehp controller & slot structs (Lukas Wunner) - Constify hotplug_slot_ops (Lukas Wunner) - Drop hotplug_slot_info (Lukas Wunner) - Embed hotplug_slot struct into users instead of allocating it separately (Lukas Wunner) - Initialize PCIe port service drivers directly instead of relying on initcall ordering (Keith Busch) - Restore PCI config state after a slot reset (Keith Busch) - Save/restore DPC config state along with other PCI config state (Keith Busch) - Reference count devices during AER handling to avoid race issue with concurrent hot removal (Keith Busch) - If an Upstream Port reports ERR_FATAL, don't try to read the Port's config space because it is probably unreachable (Keith Busch) - During error handling, use slot-specific reset instead of secondary bus reset to avoid link up/down issues on hotplug ports (Keith Busch) - Restore previous AER/DPC handling that does not remove and re-enumerate devices on ERR_FATAL (Keith Busch) - Notify all drivers that may be affected by error recovery resets (Keith Busch) - Always generate error recovery uevents, even if a driver doesn't have error callbacks (Keith Busch) - Make PCIe link active reporting detection generic (Keith Busch) - Support D3cold in PCIe hierarchies during system sleep and runtime, including hotplug and Thunderbolt ports (Mika Westerberg) - Handle hpmemsize/hpiosize kernel parameters uniformly, whether slots are empty or occupied (Jon Derrick) - Remove duplicated include from pci/pcie/err.c and unused variable from cpqphp (YueHaibing) - Remove driver pci_cleanup_aer_uncorrect_error_status() calls (Oza Pawandeep) - Uninline PCI bus accessors for better ftracing (Keith Busch) - Remove unused AER Root Port .error_resume method (Keith Busch) - Use kfifo in AER instead of a local version (Keith Busch) - Use threaded IRQ in AER bottom half (Keith Busch) - Use managed resources in AER core (Keith Busch) - Reuse pcie_port_find_device() for AER injection (Keith Busch) - Abstract AER interrupt handling to disconnect error injection (Keith Busch) - Refactor AER injection callbacks to simplify future improvments (Keith Busch) * pci/hotplug: PCI/AER: Refactor error injection fallbacks PCI/AER: Abstract AER interrupt handling PCI/AER: Reuse existing pcie_port_find_device() interface PCI/AER: Use managed resource allocations PCI/AER: Use threaded IRQ for bottom half PCI/AER: Use kfifo_in_spinlocked() to insert locked elements PCI/AER: Use kfifo for tracking events instead of reimplementing it PCI/AER: Remove error source from AER struct aer_rpc PCI/AER: Remove unused aer_error_resume() PCI: Uninline PCI bus accessors for better ftracing PCI/AER: Remove pci_cleanup_aer_uncorrect_error_status() calls PCI: pnv_php: Use kmemdup() PCI: cpqphp: Remove set but not used variable 'physical_slot' PCI/ERR: Remove duplicated include from err.c PCI: Equalize hotplug memory and io for occupied and empty slots PCI / ACPI: Whitelist D3 for more PCIe hotplug ports ACPI / property: Allow multiple property compatible _DSD entries PCI/PME: Implement runtime PM callbacks PCI: pciehp: Implement runtime PM callbacks PCI/portdrv: Add runtime PM hooks for port service drivers PCI/portdrv: Resume upon exit from system suspend if left runtime suspended PCI: pciehp: Do not handle events if interrupts are masked PCI: pciehp: Disable hotplug interrupt during suspend PCI / ACPI: Enable wake automatically for power managed bridges PCI: Do not skip power-managed bridges in pci_enable_wake() PCI: Make link active reporting detection generic PCI: Unify device inaccessible PCI/ERR: Always report current recovery status for udev PCI/ERR: Simplify broadcast callouts PCI/ERR: Run error recovery callbacks for all affected devices PCI/ERR: Handle fatal error recovery PCI/ERR: Use slot reset if available PCI/AER: Don't read upstream ports below fatal errors PCI/AER: Take reference on error devices PCI/DPC: Save and restore config state PCI: portdrv: Restore PCI config state on slot reset PCI: portdrv: Initialize service drivers directly PCI: hotplug: Document TODOs PCI: hotplug: Embed hotplug_slot PCI: hotplug: Drop hotplug_slot_info PCI: hotplug: Constify hotplug_slot_ops PCI: pciehp: Reshuffle controller struct for clarity PCI: pciehp: Rename controller struct members for clarity PCI: pciehp: Unify controller and slot structs PCI: pciehp: Tolerate Presence Detect hardwired to zero PCI: pciehp: Drop hotplug_slot_ops wrappers PCI: pciehp: Drop unnecessary includes PCI: pciehp: Differentiate between surprise and safe removal PCI: Simplify disconnected marking
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Bjorn Helgaas authored
- Remove x86 and arm64 node-local allocation for host bridge structures (Punit Agrawal) - Pay attention to device-specific _PXM node values (Jonathan Cameron) - Support new Immediate Readiness bit (Felipe Balbi) * pci/enumeration: PCI: Add support for Immediate Readiness ACPI/PCI: Pay attention to device-specific _PXM node values x86/PCI: Remove node-local allocation when initialising host controller arm64: PCI: Remove node-local allocations when initialising host controller
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Bjorn Helgaas authored
- Fix ASPM link_state teardown on removal (Lukas Wunner) - Fix misleading _OSC ASPM message (Sinan Kaya) - Make _OSC optional for PCI (Sinan Kaya) - Don't initialize ASPM link state when ACPI_FADT_NO_ASPM is set (Patrick Talbert) * pci/aspm: PCI/ASPM: Do not initialize link state when aspm_disabled is set PCI/ACPI: Allow _OSC presence to be optional for PCI PCI/ACPI: Correct error message for ASPM disabling PCI/ASPM: Fix link_state teardown on device removal
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- Oct 19, 2018
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Keith Busch authored
Move the bus ops fallback into separate functions. No functional change here. Signed-off-by:
Keith Busch <keith.busch@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Keith Busch authored
The aer_inject module was directly calling aer_irq(). This required the AER driver export its private IRQ handler for no other reason than to support error injection. A driver should not have to expose its private interfaces, so use the IRQ subsystem to route injection to the AER driver, and make aer_irq() a private interface. This provides additional benefits: First, directly calling the IRQ handler bypassed the IRQ subsytem so the injection wasn't really synthesizing what happens if a shared AER interrupt occurs. The error injection had to provide the callback data directly, which may be racing with a removal that is freeing that structure. The IRQ subsystem can handle that race. Finally, using the IRQ subsystem automatically reacts to threaded IRQs, keeping the error injection abstracted from that implementation detail. Signed-off-by:
Keith Busch <keith.busch@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Keith Busch authored
The port services driver already provides a method to find the pcie_device for a service. Export that function, use it from the aer_inject module, and remove the duplicate functionality. Signed-off-by:
Keith Busch <keith.busch@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Keith Busch authored
Use the managed device resource allocations for the service data so the AER driver doesn't need to manage it, further simplifying this driver. Link: https://lore.kernel.org/linux-pci/20180918235848.26694-12-keith.busch@intel.com Signed-off-by:
Keith Busch <keith.busch@intel.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Bartlomiej Zolnierkiewicz authored
'default n' is the default value for any bool or tristate Kconfig setting so there is no need to write it explicitly. Also since commit f467c564 ("kconfig: only write '# CONFIG_FOO is not set' for visible symbols") the Kconfig behavior is the same regardless of 'default n' being present or not: ... One side effect of (and the main motivation for) this change is making the following two definitions behave exactly the same: config FOO bool config FOO bool default n With this change, neither of these will generate a '# CONFIG_FOO is not set' line (assuming FOO isn't selected/implied). That might make it clearer to people that a bare 'default n' is redundant. ... Signed-off-by:
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Zachary Zhang authored
The PCI controller in the Marvell Armada 3720 does not implement a software-accessible root port PCI bridge configuration space. This causes a number of problems when using PCIe switches or when the Max Payload size needs to be aligned between the root complex and the endpoint. Implementing an emulated root PCI bridge, like is already done in the pci-mvebu driver for older Marvell platforms allows to solve those issues, and also to support features such as ASR, PME, VC, HP. Signed-off-by:
Zachary Zhang <zhangzg@marvell.com> [Thomas: convert to the common emulated PCI bridge logic.] Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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Thomas Petazzoni authored
Convert the pci-mvebu driver to use the pci-bridge-emul logic, that helps emulating a root port PCI bridge configuration space. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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Thomas Petazzoni authored
Commit dc0352ab ("PCI: mvebu: Add PCI Express root complex capability block") added support for emulating the PCI Express capability block. As part of this, the pcie_sltcap, pcie_devctl and pcie_rtctl fields were added to the mvebu_sw_pci_bridge structure, and used when reading the corresponding PCI Express capability block registers. However, those structure members are never set to any value other than zero. This makes them unneeded because: - pcie_devctl is used to OR *value, so with pcie_devctl always zero, it has no effect. - for pcie_sltcap and pcie_rtstl, the mvebu_sw_pci_bridge_read() function always returns 0 for registers that are not explicitly handled. In preparation for reworking the PCI bridge emulation logic in pci-mvebu, let's simplify the code by dropping those structure members. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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Thomas Petazzoni authored
Some PCI host controllers do not expose a configuration space for the root port PCI bridge. Due to this, the Marvell Armada 370/38x/XP PCI controller driver (pci-mvebu) emulates a root port PCI bridge configuration space, and uses that to (among other things) dynamically create the memory windows that correspond to the PCI MEM and I/O regions. Since we now need to add a very similar logic for the Marvell Armada 37xx PCI controller driver (pci-aardvark), instead of duplicating the code, we create in this commit a common logic called pci-bridge-emul. The idea of this logic is to emulate a root port PCI bridge configuration space by providing configuration space read/write operations, and faking behind the scenes the configuration space of a PCI bridge. A PCI host controller driver simply has to call pci_bridge_emul_conf_read() and pci_bridge_emul_conf_write() to read/write the configuration space of the bridge. By default, the PCI bridge configuration space is simply emulated by a chunk of memory, but the PCI host controller can override the behavior of the read and write operations on a per-register basis to do additional actions if needed. We take care of complying with the behavior of the PCI configuration space registers in terms of bits that are read-write, read-only, reserved and write-1-to-clear. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Jon Derrick authored
The VMD removal path calls pci_stop_root_busi(), which tears down the pcie tree, including detaching all of the attached drivers. During driver detachment, devices may use pci_release_region() to release resources. This path relies on the resource being accessible in resource tree. By detaching the child domain from the parent resource domain prior to stopping the bus, we are preventing the list traversal from finding the resource to be freed. If we instead detach the resource after stopping the bus, we will have properly freed the resource and detaching is simply accounting at that point. Without this order, the resource is never freed and is orphaned on VMD removal, leading to a warning: [ 181.940162] Trying to free nonexistent resource <e5a10000-e5a13fff> Fixes: 2c2c5c5c ("x86/PCI: VMD: Attach VMD resources to parent domain's resource tree") Signed-off-by:
Jon Derrick <jonathan.derrick@intel.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by:
Keith Busch <keith.busch@intel.com>
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- Oct 18, 2018
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Logan Gunthorpe authored
Create a configfs attribute in each nvme-fabrics namespace to enable P2P memory use. The attribute may be enabled (with a boolean) or a specific P2P device may be given (with the device's PCI name). When enabled, the namespace will ensure the underlying block device supports P2P and is compatible with any specified P2P device. If no device was specified it will ensure there is compatible P2P memory somewhere in the system. Enabling a namespace with P2P memory will fail with EINVAL (and an appropriate dmesg error) if any of these conditions are not met. Once a controller is set up on a specific port, the P2P device to use for each namespace will be found and stored in a radix tree by namespace ID. When memory is allocated for a request, the tree is used to look up the P2P device to allocate memory against. If no device is in the tree (because no appropriate device was found), or if allocation of P2P memory fails, fall back to using regular memory. Signed-off-by:
Stephen Bates <sbates@raithlin.com> Signed-off-by:
Steve Wise <swise@opengridcomputing.com> [hch: partial rewrite of the initial code] Signed-off-by:
Christoph Hellwig <hch@lst.de> Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Logan Gunthorpe authored
Add helpers to allocate and free the SGL in a struct nvmet_req: int nvmet_req_alloc_sgl(struct nvmet_req *req) void nvmet_req_free_sgl(struct nvmet_req *req) This will be expanded in a future patch to implement peer-to-peer memory DMAs and should be common with all target drivers. The new helpers are used in nvmet-rdma. Seeing we use req.transfer_len as the length of the SGL it is set earlier and cleared on any error. It also seems to be unnecessary to accumulate the length as the map_sgl functions should only ever be called once per request. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de> Acked-by:
Sagi Grimberg <sagi@grimberg.me>
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Logan Gunthorpe authored
For P2P requests, we must use the pci_p2pmem_map_sg() function instead of the dma_map_sg functions. With that, we can then indicate PCI_P2P support in the request queue. For this, we create an NVME_F_PCI_P2P flag which tells the core to set QUEUE_FLAG_PCI_P2P in the request queue. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Sagi Grimberg <sagi@grimberg.me> Reviewed-by:
Christoph Hellwig <hch@lst.de> Reviewed-by:
Keith Busch <keith.busch@intel.com>
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Logan Gunthorpe authored
Register the CMB buffer as p2pmem and use the appropriate allocation functions to create and destroy the IO submission queues. If the CMB supports WDS and RDS, publish it for use as P2P memory by other devices. Kernels without CONFIG_PCI_P2PDMA will also no longer support NVMe CMB. However, seeing the main use-cases for the CMB is P2P operations, this seems like a reasonable dependency. We drop the __iomem safety on the buffer seeing that, by convention, it's safe to directly access memory mapped by memremap()/devm_memremap_pages(). Architectures where this is not safe will not be supported by memremap() and therefore will not support PCI P2P and have no support for CMB. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Keith Busch <keith.busch@intel.com> Reviewed-by:
Christoph Hellwig <hch@lst.de>
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Logan Gunthorpe authored
In order to use PCI P2P memory the pci_p2pmem_map_sg() function must be called to map the correct PCI bus address. To do this, check the first page in the scatter list to see if it is P2P memory or not. At the moment, scatter lists that contain P2P memory must be homogeneous so if the first page is P2P the entire SGL should be P2P. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de> Reviewed-by:
Sagi Grimberg <sagi@grimberg.me>
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Logan Gunthorpe authored
Add QUEUE_FLAG_PCI_P2P, meaning a driver's request queue supports targeting P2P memory. This will be used by P2P providers and orchestrators (in subsequent patches) to ensure block devices can support P2P memory before submitting P2P-backed pages to submit_bio(). Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de> Acked-by:
Jens Axboe <axboe@kernel.dk>
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Logan Gunthorpe authored
Add a restructured text file describing how to write drivers with support for P2P DMA transactions. The document describes how to use the APIs that were added in the previous few commits. Also adds an index for the PCI documentation tree even though this is the only PCI document that has been converted to restructured text at this time. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Cc: Jonathan Corbet <corbet@lwn.net>
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Logan Gunthorpe authored
Add a new directory in the driver API guide for PCI-specific documentation. This is in preparation for adding a new PCI P2P DMA driver writers guide which will go in this directory. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Logan Gunthorpe <logang@deltatee.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Sanyog Kale <sanyog.r.kale@intel.com> Cc: Sagar Dharia <sdharia@codeaurora.org>
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Logan Gunthorpe authored
Users of the P2PDMA infrastructure will typically need a way for the user to tell the kernel to use P2P resources. Typically this will be a simple on/off boolean operation but sometimes it may be desirable for the user to specify the exact device to use for the P2P operation. Add new helpers for attributes which take a boolean or a PCI device. Any boolean as accepted by strtobool() turn P2P on or off (such as 'y', 'n', '1', '0', etc). Specifying a full PCI device name/BDF will select the specific device. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de>
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Logan Gunthorpe authored
The DMA address used when mapping PCI P2P memory must be the PCI bus address. Thus, introduce pci_p2pmem_map_sg() to map the correct addresses when using P2P memory. Memory mapped in this way does not need to be unmapped and thus if we provided pci_p2pmem_unmap_sg() it would be empty. This breaks the expected balance between map/unmap but was left out as an empty function doesn't really provide any benefit. In the future, if this call becomes necessary it can be added without much difficulty. For this, we assume that an SGL passed to these functions contain all P2P memory or no P2P memory. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de>
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Logan Gunthorpe authored
Add a sysfs group to display statistics about P2P memory that is registered in each PCI device. Attributes in the group display the total amount of P2P memory, the amount available and whether it is published or not. Signed-off-by:
Logan Gunthorpe <logang@deltatee.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Christoph Hellwig <hch@lst.de>
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- Oct 17, 2018
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Honghui Zhang authored
Implement remove() callback function for the Mediatek PCIe controller driver to add loadable kernel module support. Save the PCIe's GIC IRQ at probe so that it can be retrieved to call dispose_irq() to tear down the IRQ upon module removal. Signed-off-by:
Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by:
Ryder Lee <ryder.lee@mediatek.com>
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Honghui Zhang authored
In order to reduce the PCIe power consumption in system suspend, the PCI bus physical layer should be gated. On system resume, the PCIe link should be re-established and the related control register values should be restored. Define suspend_noirq & resume_noirq callback functions to implement PM system syspend hooks for the PCI host controller. Signed-off-by:
Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Ryder Lee <ryder.lee@mediatek.com>
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Honghui Zhang authored
Commit 43e6409d ("PCI: mediatek: Add MSI support for MT2712 and MT7622") added MSI support but enabled MSI in the wrong place, at a step in the probe sequence where clocks were not still enabled. Fix this issue by calling mtk_pcie_enable_msi() in mtk_pcie_startup_port_v2() since clocks are enabled when mtk_pcie_startup_port_v2() is called. To avoid forward declaration of mtk_pcie_enable_msi(), move the mtk_pcie_startup_port_v2() function definition in the file. Fixes: 43e6409d ("PCI: mediatek: Add MSI support for MT2712 and MT7622") Signed-off-by:
Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: squashed commit and adapted log] Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Ryder Lee <ryder.lee@mediatek.com>
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Honghui Zhang authored
Part of mtk_pcie_register_host() is an open-coded version of pci_host_probe(). So instead of duplicating this code, use pci_host_probe() directly and remove mtk_pcie_register_host(). Signed-off-by:
Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: commit log changes] Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by:
Ryder Lee <ryder.lee@mediatek.com>
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