- Jul 25, 2014
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Russell King authored
Add the DT fragment for the Marvell Dove LCD controllers. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/E1XAKGS-0004WE-8h@rmk-PC.arm.linux.org.uk Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Jul 23, 2014
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Ezequiel Garcia authored
In Armada 375 SoCs, the MDIO is handled by a separate orion-mdio driver, despite the register is contained within the "LMS" block of the network controller. Therefore we need to add the clock to the MDIO devicetree to prevent the controller from being accesed with its clock gated. This is needed, for instance, to be able to load the MDIO driver before the network driver. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1405961296-5846-7-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Marcin Wojtas authored
The vendor bootloader provided for Armada 375 boards expect an alias for the ethernet nodes, which is used to fixup the MAC address. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Link: https://lkml.kernel.org/r/1405961296-5846-6-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Jul 16, 2014
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Thomas Petazzoni authored
In order to support dynamic frequency scaling: * the cpuclk Device Tree node needs to be updated to describe a second set of registers describing the PMU DFS registers. * the clock-latency property of the CPUs must be filled, otherwise the ondemand and conservative cpufreq governors refuse to work. The latency is high because the cost of a frequency transition is quite high on those CPUs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1404920715-19834-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
The CA9 MPcore SoC Control block is a set of registers that allows to configure certain internal aspects of the core blocks of the SoC (Cortex-A9, L2 cache controller, etc.). In most cases, the default values are fine so they aren't many reasons to touch those registers, but there is one exception: to support cpuidle on Armada 38x, we need to modify the value of the CA9 MPcore Reset Control register. Therefore, this commit adds a new Device Tree binding for this hardware block, and uses this new binding for the Armada 38x Device Tree file. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: devicetree@vger.kernel.org Link: https://lkml.kernel.org/r/1404913221-17343-11-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Jul 14, 2014
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Ezequiel Garcia authored
This commit enables the network controller in the Armada 375 DB board, and configures the two available ethernet interfaces. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1405021936-28658-4-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Ezequiel Garcia authored
This commit adds the support for the network controller in Marvell Armada 375 SoC devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1405021936-28658-3-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Simon Guinot authored
This patch adds DT support for the LaCie NAS d2 Network v2 (d2net_v2). Most of the hardware characteristics are shared with the 2Big and 5Big Network v2 boards. - CPU: Marvell 88F6281 1200Mhz - SDRAM memory: 256MB DDR2 400Mhz - 2 SATA ports: internal and eSATA - Gigabit ethernet: PHY Marvell 88E1116R - Flash memory: SPI NOR 512KB (Macronix MX25L4005A) - i2c EEPROM: 512 bytes (24C04 type) - 2 USB2 ports: host and host/device - 1 push button - 1 power switch - 1 SATA LED (bi-color, blue and red) Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1404830545-15581-3-git-send-email-simon.guinot@sequanux.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Simon Guinot authored
The d2 Network v2 board (d2net_v2) shares a lot of hardware characteristics with the 2Big and 5Big Network v2 boards. This patch prepares the kirkwood-netxbig.dtsi file in order to allow to include it from the d2net_v2 DTS file. The DT nodes only relevant for the 2Big and 5Big Network v2 boards are moved into their respective DTS files. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1404830545-15581-2-git-send-email-simon.guinot@sequanux.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Jun 22, 2014
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Jason Cooper authored
Late correction from Simon's testing. Reported-by: Simon Guinot <simon.guinot@sequanux.org> Link: https://lkml.kernel.org/r/20140621095001.GW20207@kw.sim.vm.gnt Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Jun 21, 2014
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Sebastian Hesselbarth authored
As Mainlining effort for SolidRun CuBox has been carried out on the Engineering Sample, the board DTS was reflecting this. Actually, SolidRun CuBox comes in three different variants: Engineering Sample (ES), production with 1GB RAM (1G), and production with 2GB RAM (2G). Therefore, we base current dove-cubox.dts on to the 1G production variant and add a ES dts to add required quirk for misrouted SDHCI card detect on top of dove-cubox.dts. For the 2G variant we rely on the bootloader to setup correct RAM size. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1401228006-3212-1-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
Describe LaCie 2Big and 5Big Network v2 using device tree. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1401132591-26305-3-git-send-email-andrew@lunn.ch Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Simon Guinot <simon.guinot@sequanux.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Jun 08, 2014
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Mark Charlebois authored
Patch to prevent warning of a buggy compiler when using clang and the ARM_UNWIND option. Clang defines (at least on the current trunk) GNUC, GNUC_MINOR, and GNUC_PATCHLEVEL to 4, 2, and 1 respectively. This version of GCC gets flagged as buggy, but it isn't actually an issue with clang so the patch will do what it did before unless clang is defined and then it will not report the GCC version as an issue. Signed-off-by: Mark Charlebois <charlebm@gmail.com> Signed-off-by: Behan Webster <behanw@converseincode.com>
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Behan Webster authored
With compilers which follow the C99 standard (like modern versions of gcc and clang), "extern inline" does the wrong thing (emits code for an externally linkable version of the inline function). "static inline" is the correct choice instead. Author: Behan Webster <behanw@converseincode.com> Signed-off-by: Behan Webster <behanw@converseincode.com> Reviewed-by: Mark Charlebois <charlebm@gmail.com>
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- Jun 07, 2014
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Joe Perches authored
This typedef is unnecessary and should just be removed. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Boris BREZILLON authored
sam9x5 SoCs have the following errata: "RTC: Interrupt Mask Register cannot be used Interrupt Mask Register read always returns 0." Hence we should not rely on what IMR claims about already masked IRQs and just disable all IRQs. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Reported-by: Bryan Evenson <bevenson@melinkcorp.com> Reviewed-by: Johan Hovold <johan@hovold.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Bryan Evenson <bevenson@melinkcorp.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Mark Roszko <mark.roszko@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Nishanth Menon authored
OMAP5432, DRA75x and DRA72x have MPU DPLLs that need Duty Cycle Correction(DCC) to operate safely at frequencies >= 1.4GHz. Switch to "ti,omap5-mpu-dpll-clock" compatible property which provides this support. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Andrii Tseglytskyi authored
Duty Cycle Correction(DCC) needs to be enabled if the MPU is to run at frequencies beyond 1.4GHz for OMAP5, DRA75x, DRA72x. MPU DPLL has a limitation on the maximum frequency it can be locked at. Duty Cycle Correction circuit is used to recover a correct duty cycle for achieving higher frequencies (hardware internally switches output to M3 output(CLKOUTHIF) from M2 output (CLKOUT)). For further information, See the note on OMAP5432 Technical Reference Manual(SWPU282U) chapter 3.6.3.3.1 "DPLLs Output Clocks Parameters", and also the "OMAP543x ES2.0 DM Operating Conditions Addendum v0.5" chapter 2.1 "Micro Processor Unit (MPU)". Equivalent information is present in relevant DRA75x, 72x documentation(SPRUHP2E, SPRUHI2P). Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> Signed-off-by: Taras Kondratiuk <taras@ti.com> Signed-off-by: J Keerthy <j-keerthy@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> [t-kristo@ti.com: added TRM / DM references for DCC clock rate] Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Linus Torvalds authored
Russell King points out that my ARM merge (commit eb3d3ec5) was broken wrt the arch/arm/mach-mvebu/board-v7.c file, leaving in a stale l2x0_of_init() call (it's now handled by the DT description). Which is kind of embarrassing, since I knew about it as it wasn't the only file that had similar merge issues. At least I got the other ones right. Reported-by: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 06, 2014
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Santosh Shilimkar authored
Laura's series removed the meminfo structure and its no longer available. Update keystone code to remove the usage of it. Reported-by: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- Jun 05, 2014
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Vince Weaver authored
Make the ARM perf code use the new common PMU interrupt disabled code. This allows perf to work on ARM machines without a working PMU interrupt (for example, raspberry pi). Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Vince Weaver <vincent.weaver@maine.edu> [peterz: applied changes suggested by Will] Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161712190.11099@vincent-weaver-1.umelst.maine.edu [ Small readability tweaks to the code. ] Signed-off-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Nicolas Pitre authored
It is better not to think about compute capacity as being equivalent to "CPU power". The upcoming "power aware" scheduler work may create confusion with the notion of energy consumption if "power" is used too liberally. This contains the architecture visible changes. Incidentally, only ARM takes advantage of the available pow^H^H^Hcapacity scaling hooks and therefore those changes outside kernel/sched/ are confined to one ARM specific file. The default arch_scale_smt_power() hook is not overridden by anyone. Replacements are as follows: arch_scale_freq_power --> arch_scale_freq_capacity arch_scale_smt_power --> arch_scale_smt_capacity SCHED_POWER_SCALE --> SCHED_CAPACITY_SCALE SCHED_POWER_SHIFT --> SCHED_CAPACITY_SHIFT The local usage of "power" in arch/arm/kernel/topology.c is also changed to "capacity" as appropriate. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Morten Rasmussen <morten.rasmussen@arm.com> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: linaro-kernel@lists.linaro.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Dietmar Eggemann <dietmar.eggemann@arm.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Brown <broonie@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/n/tip-48zba9qbznvglwelgq2cfygh@git.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Naoya Horiguchi authored
Currently hugepage migration is available for all archs which support pmd-level hugepage, but testing is done only for x86_64 and there're bugs for other archs. So to avoid breaking such archs, this patch limits the availability strictly to x86_64 until developers of other archs get interested in enabling this feature. Simply disabling hugepage migration on non-x86_64 archs is not enough to fix the reported problem where sys_move_pages() hits the BUG_ON() in follow_page(FOLL_GET), so let's fix this by checking if hugepage migration is supported in vma_migratable(). Signed-off-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com> Reported-by: Michael Ellerman <mpe@ellerman.id.au> Tested-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Hugh Dickins <hughd@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: <stable@vger.kernel.org> [3.12+] Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 04, 2014
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Arnd Bergmann authored
The prototype for mvebu_mbus_dt_init() changed around the same time as a new caller was added to orion5x. This adds the missing argument to make orion5x behave correctly. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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- Jun 03, 2014
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Jyri Sarha authored
Adds HDMI audio sDMA properties. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Jyri Sarha authored
Adds HDMI audio sDMA properties. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Add the necessary DTS nodes to enable the micro-HDMI output on Parlor board. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Alto35 expansion board has a ZIF connector for a 3.5'' LCD. Add a common include file for this configuration, and use it on Alto35. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Chestnut43, Gallop43 and Palo43 expansion boards have a ZIF connector for a 4.3'' LCD. Add a common include file for this configuration, and use it on relevant expansion boards. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Summit and Tobi expansion boards have a HDMI connector with a TFP410 encoder. Add a common include file for this configuration, and then use it for Summit and Tobi. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Looks like quite a few omap3 boards have sharp ls037v7dw01 that's configured as various panel dpi entries for whatever legacy reasons. For device tree based support, let's just configure these properly for panel ls037v7dw01 instead of panel dpi. This patch creates a common file for panel ls037v7dw01, and makes boards ldp and omap3-evm to use it. The ls037v7dw01 also seems to be coupled with an ad7846 touchscreen controller for the omaps, so let's add a basic configuration for the touchscreen also using the default values. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Marek Belisko authored
This patch add support for lcd display on gta04 board. Display control is connected to spi (used spi bitbang driver). Signed-off-by: Marek Belisko <marek@goldelico.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
omap5-uevm has a single HDMI output. Add the necessary display information, including pinmuxing. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
omap5-uevm has a tca6424a I/O expander. Add it to the .dts file. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
Add OMAP5 DSS nodes to omap5.dtsi. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
Add DT data for am43x-epos-evm's LCD panel. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Sathya Prakash M R authored
Add DT data for am437x-gp-evm's LCD panel. Signed-off-by: Sathya Prakash M R <sathyap@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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Sathya Prakash M R authored
Add DT data for the display subsystem for AM4372. The DSS on AM4372 is basically OMAP3's DSS, without DSI and VENC blocks. Signed-off-by: Sathya Prakash M R <sathyap@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
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- Jun 02, 2014
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Russell King authored
This does the same as the previous commit, but for the S bit, which also needs to match the initial value which the assembly code used for the same reasons. Again, we add a check for SMP to ensure that the page tables are correctly setup for SMP. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ulf Hansson authored
Remove the option to provide DMA configuration as platform data, enforce it through DT. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Roland Stigge <stigge@antcom.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
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