There is a QSPI chip connected to the FlexSPI bus.  Enable it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The i.MX8M Nano has the same Flexspi controller used in the i.MX8M
Mini.  Add the node and disable it by default.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add librem5-r4 with specifics to that revision like the near-level,
battery and charger properties. For schematics and more information,
see https://developer.puri.sm/Librem5/Hardware_Reference/Evergreen.html



Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Expect all those regulators to be turned on initially.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This enables the Librem5's ft8006p based LCD panel driven by the
imx8mq's Northwest Logic DSI IP core and mxsfb display controller.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

It's a supply for to touch and LCD.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The tps65982 feeds the bq25895 charge controller on the Librem 5.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

With the pmic driver fixed we can now shut off the regulator in the gpc.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This is consistent with other IRQs and makes keeps currents low.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Increase the SmartEEE Tw parameter for Atheros PHYs to stop gigabit
links from sporadically dropping. Testing on this platform shows that
a value of 24 results in a stable link, whereas 23 or below has the
occasional drop.

Tested with a Netgear GS116 unmanaged switch link partner with Cat 5e
cabling.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

We are using Jailhouse Hypervsior which has virtual pci node that
use dt domains. so also use dt domains for pci node, this will avoid
conflict with Jailhouse Hypervisor to trigger the following error:
          pr_err("Inconsistent \"linux,pci-domain\" property in DT\n");

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add fsl,stop-mode property for FEC to enable stop mode.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add mac address in efuse, so that FEC driver can parse it from nvmem
cell.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Assign clock parents for FEC, set "ptp" clock to 100M, "enet_clk_ref" to
125M.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
CLK_ENET_PHY_REF clock.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have a proper driver for the FlexSPI interface use it. This
will fix SCK frequency switching on Layerscape SoCs.

This was tested on the Kontron sl28 board.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

eCSPI ports have DMA capability. Describe the eCSPI DMA properties.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

With a newer bootloader SATA might be used in a mPCI slot using a mSATA
card. Enable the SATA controller on the Kontron K-Box LS-230-A which
comes with such a slot.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The RTC interrupt is incorrect and prevents the RTC driver
initialising. In any case, the PCF2127 driver wants an active low
interrupt, which neither the GIC nor the GPIO blocks support.
There is an ISPPT block in the LX2160A, but this is not supported
in mainline kernels. So, just delete the interrupt.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

On the i.MX8MN Beacon SOM, there is an RTC chip which is fed power
from the baseboard during power off.  The SNVS RTC integrated into
the SoC is not fed power.  Depending on the order the modules are
loaded, this can be a problem if the external RTC isn't rtc0.

Make the alias for rtc0 point to the external RTC all the time and
rtc1 point to the SVNS in order to correctly hold date/time over
a power-cycle.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The WiFi chip is capable of communication at SDR104 speeds.
Enable 100Mhz and 200MHz pinmux to support this.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add support for the power button.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add interconnect ports for lcdif to set bus capabilities.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add #interconnect-cells on main &noc so that it will probe the interconnect
provider.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add initial support for dynamic frequency scaling of the main NOC
on imx8mq.

Make DDRC the parent of the NOC (using passive governor) so that the
main NOC is automatically scaled together with DDRC by default.

Support for proactive scaling via interconnect will come on top.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

There is a new variant 1 of this board available. It features up to four
SerDes lanes for customer use. Add a new device tree which features just
the basic peripherals. A customer will then have to modify or append to
this device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add initial support for phyBOARD-Pollux-i.MX8MP.
Supported basic features:
	* eMMC
	* i2c EEPROM
	* i2c RTC
	* i2c LED
	* PMIC
	* debug UART
	* SD card
	* 1Gbit Ethernet (fec)
	* watchdog

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The Gateworks Venice GW71xx-0x/GW72xx-0x/GW73xx-0x are development
kits consisting of a GW700x SoM and a Baseboard. Future SoM's such
as the GW701x will create additional combinations.

The GW700x SoM contains:
 - i.MX 8M Mini SoC
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller (eeprom/pushbutton/reset/voltage-monitor)
 - GbE PHY connected to the i.MX 8M Mini FEC
 - Power Management IC

The GW71xx Baseboard contains:
 - 1x MiniPCIe Socket with USB2.0, PCIe, and SIM
 - 1x RJ45 GbE (i.MX 8M Mini FEC)
 - I/O connector with 1x-SPI/1x-I2C/1x-UART/4x-GPIO signals
 - PCIe Clock generator
 - GPS and accelerometer
 - 1x USB 2.0 Front Panel connector
 - wide range power supply

The GW72xx Baseboard contains:
 - 2x MiniPCIe Socket with USB2.0, PCIe, and SIM
 - 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x)
 - 1x MicroSD connector
 - 1x USB 2.0 Front Panel connector
 - 1x SPI connector
 - 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of:
   RS232 w/ flow-control, RS485, RS422
 - PCIe Clock generator
 - GPS and accelerometer
 - Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S)
 - I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C
 - wide range power supply

The GW73xx Baseboard contains:
 - 3x MiniPCIe Socket with USB2.0, PCIe, and SIM
 - 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x)
 - 1x MicroSD connector
 - 1x USB 2.0 Front Panel connector
 - 1x SPI connector
 - 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of:
   RS232 w/ flow-control, RS485, RS422
 - WiFi/BT
 - PCIe Clock generator
 - GPS and accelerometer
 - Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S)
 - I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C
 - wide range power supply

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

In order to be able to use NVMEM APIs to read soc unique ID, add the
nvmem data cell and name for nvmem-cells to the "soc" node, and add a
nvmem node which provides soc unique ID to efuse@30350000.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Add compatible string to .dtsi files for binding of imx8_soc_info and
device.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Now that we have constants, use them. This is just a mechanical change.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

This is a workaround for a hardware bug in the r3 revision that basically would
stop the system due to traffic on the i2c1 bus. A cpu voltage change would
trigger such traffic and that's what is avoided in order to work around it.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

According to commit e045f044 ("arm64: dts: imx8mq: Move usdhc clocks
assignment to board DT") add the clocks assignment to imx8mq-librem5.dtsi
too.

Fixes: e045f044

 ("arm64: dts: imx8mq: Move usdhc clocks assignment to board DT")
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

In order for the touchscreen interrupt line to work, describe it properly.
Otherwise it can work if defaults are ok, but we cannot be sure.

Fixes: 8f0216b0

 ("arm64: dts: Add a device tree for the Librem 5 phone")
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>