- Jul 09, 2014
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Ash Charles authored
This adds the Gumstix Pepper[1] single-board computer based on the TI AM335x processor. Schematics are available [2]. [1] https://store.gumstix.com/index.php/products/344/ [2] https://pubs.gumstix.com/boards/PEPPER/ Signed-off-by:
Ash Charles <ashcharles@gmail.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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R Sricharan authored
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Here, adding a new crossbar device node and replacing all the peripheral interrupt numbers with its fixed crossbar input lines. Signed-off-by:
Sricharan R <r.sricharan@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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R Sricharan authored
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by:
Sricharan R <r.sricharan@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Jul 02, 2014
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Darren Etheridge authored
Add the necessary nodes to enable the LCD controller and the LCD panel that is attached to the Texas Instruments AM335x EVMSK platform. Also setup the necessary pin mux within the DT file to drive the LCD connector and add the correct pinmux settings for the lcd pins to be configured to when the SoC goes into sleep state for the minimum power consumption. For the sleep mode LCD pin settings, MUX_MODE7 is chosen as this corresponds to switching the pins into input GPIO's with an internal pulldown. Which has been determined to offer the lowest power solution vs leaving the pins configured in LCD mode. Signed-off-by:
Darren Etheridge <detheridge@ti.com> Acked-by:
Wolfram Sang <wsa@sang-engineering.com> Tested-by:
Felipe Balbi <balbi@ti.com> Acked-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Jul 01, 2014
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Felipe Balbi authored
Add support for TI's AM437x StarterKit Evaluation Module. Cc: Josh Elliot <jelliott@ti.com> Signed-off-by:
Felipe Balbi <balbi@ti.com> Tested-by:
Franklin Cooper Jr. <fcooper@ti.com> Tested-by:
Tom Rini <trini@ti.com> Tested-by:
Darren Etheridge <detheridge@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Felipe Balbi authored
By providing labels for rtc, wdt, cpu and dispc nodes, boards can access them to add board-specific data. Signed-off-by:
Felipe Balbi <balbi@ti.com> Tested-by:
Franklin Cooper Jr. <fcooper@ti.com> Tested-by:
Tom Rini <trini@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Jun 08, 2014
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Mark Charlebois authored
Patch to prevent warning of a buggy compiler when using clang and the ARM_UNWIND option. Clang defines (at least on the current trunk) GNUC, GNUC_MINOR, and GNUC_PATCHLEVEL to 4, 2, and 1 respectively. This version of GCC gets flagged as buggy, but it isn't actually an issue with clang so the patch will do what it did before unless clang is defined and then it will not report the GCC version as an issue. Signed-off-by:
Mark Charlebois <charlebm@gmail.com> Signed-off-by:
Behan Webster <behanw@converseincode.com>
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Behan Webster authored
With compilers which follow the C99 standard (like modern versions of gcc and clang), "extern inline" does the wrong thing (emits code for an externally linkable version of the inline function). "static inline" is the correct choice instead. Author: Behan Webster <behanw@converseincode.com> Signed-off-by:
Behan Webster <behanw@converseincode.com> Reviewed-by:
Mark Charlebois <charlebm@gmail.com>
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- Jun 07, 2014
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Joe Perches authored
This typedef is unnecessary and should just be removed. Signed-off-by:
Joe Perches <joe@perches.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Boris BREZILLON authored
sam9x5 SoCs have the following errata: "RTC: Interrupt Mask Register cannot be used Interrupt Mask Register read always returns 0." Hence we should not rely on what IMR claims about already masked IRQs and just disable all IRQs. Signed-off-by:
Boris BREZILLON <boris.brezillon@free-electrons.com> Reported-by:
Bryan Evenson <bevenson@melinkcorp.com> Reviewed-by:
Johan Hovold <johan@hovold.com> Acked-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Bryan Evenson <bevenson@melinkcorp.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Mark Roszko <mark.roszko@gmail.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Nishanth Menon authored
OMAP5432, DRA75x and DRA72x have MPU DPLLs that need Duty Cycle Correction(DCC) to operate safely at frequencies >= 1.4GHz. Switch to "ti,omap5-mpu-dpll-clock" compatible property which provides this support. Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Tero Kristo <t-kristo@ti.com>
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Andrii Tseglytskyi authored
Duty Cycle Correction(DCC) needs to be enabled if the MPU is to run at frequencies beyond 1.4GHz for OMAP5, DRA75x, DRA72x. MPU DPLL has a limitation on the maximum frequency it can be locked at. Duty Cycle Correction circuit is used to recover a correct duty cycle for achieving higher frequencies (hardware internally switches output to M3 output(CLKOUTHIF) from M2 output (CLKOUT)). For further information, See the note on OMAP5432 Technical Reference Manual(SWPU282U) chapter 3.6.3.3.1 "DPLLs Output Clocks Parameters", and also the "OMAP543x ES2.0 DM Operating Conditions Addendum v0.5" chapter 2.1 "Micro Processor Unit (MPU)". Equivalent information is present in relevant DRA75x, 72x documentation(SPRUHP2E, SPRUHI2P). Signed-off-by:
Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> Signed-off-by:
Taras Kondratiuk <taras@ti.com> Signed-off-by:
J Keerthy <j-keerthy@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> [t-kristo@ti.com: added TRM / DM references for DCC clock rate] Signed-off-by:
Tero Kristo <t-kristo@ti.com>
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Linus Torvalds authored
Russell King points out that my ARM merge (commit eb3d3ec5 ) was broken wrt the arch/arm/mach-mvebu/board-v7.c file, leaving in a stale l2x0_of_init() call (it's now handled by the DT description). Which is kind of embarrassing, since I knew about it as it wasn't the only file that had similar merge issues. At least I got the other ones right. Reported-by:
Russell King <rmk@arm.linux.org.uk> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 06, 2014
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Santosh Shilimkar authored
Laura's series removed the meminfo structure and its no longer available. Update keystone code to remove the usage of it. Reported-by:
Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Jun 05, 2014
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Vince Weaver authored
Make the ARM perf code use the new common PMU interrupt disabled code. This allows perf to work on ARM machines without a working PMU interrupt (for example, raspberry pi). Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Vince Weaver <vincent.weaver@maine.edu> [peterz: applied changes suggested by Will] Signed-off-by:
Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161712190.11099@vincent-weaver-1.umelst.maine.edu [ Small readability tweaks to the code. ] Signed-off-by:
Ingo Molnar <mingo@kernel.org> Signed-off-by:
Ingo Molnar <mingo@kernel.org>
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Nicolas Pitre authored
It is better not to think about compute capacity as being equivalent to "CPU power". The upcoming "power aware" scheduler work may create confusion with the notion of energy consumption if "power" is used too liberally. This contains the architecture visible changes. Incidentally, only ARM takes advantage of the available pow^H^H^Hcapacity scaling hooks and therefore those changes outside kernel/sched/ are confined to one ARM specific file. The default arch_scale_smt_power() hook is not overridden by anyone. Replacements are as follows: arch_scale_freq_power --> arch_scale_freq_capacity arch_scale_smt_power --> arch_scale_smt_capacity SCHED_POWER_SCALE --> SCHED_CAPACITY_SCALE SCHED_POWER_SHIFT --> SCHED_CAPACITY_SHIFT The local usage of "power" in arch/arm/kernel/topology.c is also changed to "capacity" as appropriate. Signed-off-by:
Nicolas Pitre <nico@linaro.org> Signed-off-by:
Peter Zijlstra <peterz@infradead.org> Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Morten Rasmussen <morten.rasmussen@arm.com> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: linaro-kernel@lists.linaro.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Dietmar Eggemann <dietmar.eggemann@arm.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Brown <broonie@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Link: http://lkml.kernel.org/n/tip-48zba9qbznvglwelgq2cfygh@git.kernel.org Signed-off-by:
Ingo Molnar <mingo@kernel.org>
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Naoya Horiguchi authored
Currently hugepage migration is available for all archs which support pmd-level hugepage, but testing is done only for x86_64 and there're bugs for other archs. So to avoid breaking such archs, this patch limits the availability strictly to x86_64 until developers of other archs get interested in enabling this feature. Simply disabling hugepage migration on non-x86_64 archs is not enough to fix the reported problem where sys_move_pages() hits the BUG_ON() in follow_page(FOLL_GET), so let's fix this by checking if hugepage migration is supported in vma_migratable(). Signed-off-by:
Naoya Horiguchi <n-horiguchi@ah.jp.nec.com> Reported-by:
Michael Ellerman <mpe@ellerman.id.au> Tested-by:
Michael Ellerman <mpe@ellerman.id.au> Acked-by:
Hugh Dickins <hughd@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Miller <davem@davemloft.net> Cc: <stable@vger.kernel.org> [3.12+] Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 04, 2014
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Arnd Bergmann authored
The prototype for mvebu_mbus_dt_init() changed around the same time as a new caller was added to orion5x. This adds the missing argument to make orion5x behave correctly. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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- Jun 03, 2014
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Jyri Sarha authored
Adds HDMI audio sDMA properties. Signed-off-by:
Jyri Sarha <jsarha@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Jyri Sarha authored
Adds HDMI audio sDMA properties. Signed-off-by:
Jyri Sarha <jsarha@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Add the necessary DTS nodes to enable the micro-HDMI output on Parlor board. Signed-off-by:
Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Alto35 expansion board has a ZIF connector for a 3.5'' LCD. Add a common include file for this configuration, and use it on Alto35. Signed-off-by:
Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Chestnut43, Gallop43 and Palo43 expansion boards have a ZIF connector for a 4.3'' LCD. Add a common include file for this configuration, and use it on relevant expansion boards. Signed-off-by:
Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Florian Vaussard authored
Summit and Tobi expansion boards have a HDMI connector with a TFP410 encoder. Add a common include file for this configuration, and then use it for Summit and Tobi. Signed-off-by:
Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Looks like quite a few omap3 boards have sharp ls037v7dw01 that's configured as various panel dpi entries for whatever legacy reasons. For device tree based support, let's just configure these properly for panel ls037v7dw01 instead of panel dpi. This patch creates a common file for panel ls037v7dw01, and makes boards ldp and omap3-evm to use it. The ls037v7dw01 also seems to be coupled with an ad7846 touchscreen controller for the omaps, so let's add a basic configuration for the touchscreen also using the default values. Signed-off-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Marek Belisko authored
This patch add support for lcd display on gta04 board. Display control is connected to spi (used spi bitbang driver). Signed-off-by:
Marek Belisko <marek@goldelico.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
omap5-uevm has a single HDMI output. Add the necessary display information, including pinmuxing. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
omap5-uevm has a tca6424a I/O expander. Add it to the .dts file. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
Add OMAP5 DSS nodes to omap5.dtsi. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Tomi Valkeinen authored
Add DT data for am43x-epos-evm's LCD panel. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Sathya Prakash M R authored
Add DT data for am437x-gp-evm's LCD panel. Signed-off-by:
Sathya Prakash M R <sathyap@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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Sathya Prakash M R authored
Add DT data for the display subsystem for AM4372. The DSS on AM4372 is basically OMAP3's DSS, without DSI and VENC blocks. Signed-off-by:
Sathya Prakash M R <sathyap@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com>
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- Jun 02, 2014
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Russell King authored
This does the same as the previous commit, but for the S bit, which also needs to match the initial value which the assembly code used for the same reasons. Again, we add a check for SMP to ensure that the page tables are correctly setup for SMP. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Ulf Hansson authored
Remove the option to provide DMA configuration as platform data, enforce it through DT. Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Roland Stigge <stigge@antcom.de> Acked-by:
Arnd Bergmann <arnd@arndb.de>
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Russell King authored
Fix a long standing bug where, for ARMv6+, we don't fully ensure that the C code sets the same cache policy as the assembly code. This was introduced partially by commit 11179d8c ([ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later) and also by adding SMP support. This patch sets the default cache policy based on the flags used by the assembly code, and then ensures that when a cache policy command line argument is used, we verify that on ARMv6, it matches the initial setup. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
We can use the alignment_trap assembly macro here too. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
cr_no_alignment is really only used by the alignment code. Since we no longer change the setting of cr_alignment after boot, we can localise this to alignment.c Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
alignment.c will not be built unless CPU_CP15 is set: config CPU_CP15 bool config CPU_CP15_MMU bool select CPU_CP15 config ALIGNMENT_TRAP bool depends on CPU_CP15_MMU So there's no point having conditionals on CPU_CP15 within this code. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
adjust_cr() is not used anymore, so let's get rid of it. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Keep all bits of alignment handling together. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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