Tie in the APMU SMP code on r8a7791. When used together
with the secondary CPU device node and smp_ops in the
board specific code then this will allow use of the
two Cortex-A15 cores in the r8a7791 SoC.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

r8a7779 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7779_init_irq_extpin() function
into "mode settings" and "funtion register" parts

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

r8a7778 INTC needs IRL pin mode settings to determine
behavior of IRQ0 - IRQ3, and r8a7778_init_irq_extpin()
is controlling it via irlm parameter.
But this function registers renesas_intc_irqpin driver
if irlm was set, and this value depends on platform.
This is not good for DT.
This patch splits r8a7778_init_irq_extpin() function
into "mode settings" and "funtion register" parts.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add SCIF serial port support to the r7s72100 SoC by
adding platform devices for SCIF0 -> SCIF7 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add initial support for the r7272100 SoC including:
 - Single Cortex-A9 CPU Core
 - GIC

No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Make use of the R-Car Gen2 arch timer workaround on r8a7791.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a platform device for the r8a7791 IRQC hardware
driving IRQ pins IRQ0 to IRQ9. The Linux interrupt
number is statically assigned to allow board code
written in C to make use of static interrupt numbers.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Introduce the function r8a7791_add_standard_devices() that
follows the same style as other mach-shmobile SoC code and
allows C version of board code to add on-chip devices.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Move arch timer workaround code and boot mode pin
handling from setup-r8a7790.c to setup-rcar-gen2.c.

With this in place the same code can be used on
other R-Car Generation 2 devices such as r8a7791.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Devices, initialised from the Device Tree and from platform code usually
have different names. This patch adds a clock alias for DMAC on r8a73a4
in DT mode.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch adds clock definitions for the 4 I2C interfaces on r8a7790 and
clock aliases, suitable for the DT mode.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add HPB-DMAC platform device on R8A7779 SoC along with its slave and channel
configurations (only for SDHI0 so far).

Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7779.h>, removed #include <mach/dma.h> from setup-r8a7779.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], added ASYNCMDR.ASBTMD{20|24|43} and ASYNCMDR.ASMD{20|24|43}
fields/values, fixed comments to ASYNCMDR.ASBTMD2[123] and ASYNCMDR.ASMD2[123]
fields/values, renamed all the bit/field/value #define's to include 'HBP_DMAE_'
prefix to match the driver, moved comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add HPB-DMAC platform device on R8A7778 SoC along with its slave and channel
configurations (only for SDHI0 so far).

Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7778.h>, removed #include <mach/dma.h> from setup-r8a7778.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], moved the comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a DMAC platform device and clock definitions for it on r8a73a4.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Renesas ARM based SoC SMP updates for v3.13

* Add CPU notifier based SCU boot vector code
  - Use on emev2, r8a7779 and sh73a0 SoCs
  - Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
  - Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
  - Use on sh73a0 SoC
  - Remove now unused shmobile_smp_init_cpus()

Add information to the shared APMU code regarding
the APMU instance used to control the CA7 cores.

This can be used on r8a7790 and r8a73a4, but should
most likely be converted to DT in the future.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Extend the APMU code with a check to only allow boot
of CPU cores that sit in the same cluster as CPU0.

This makes it possible for people to use the r8a790
CA7 boot mode with CA7-cores only. The default CA15
boot mode will enable CA15 cores only. This is an
intentional software limitation to cope with lacking
scheduler support.

By removing this patch it is possible to run all 8 cores
in parallel, but this is not recommended without out of tree
scheduler modfications or custom user space code to control
the CPU affinitiy.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Remove shmobile_smp_scu_boot_secondary() since
it is no longer used. CPU boot vector setup is
instead handled by CPU notifiers.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add CPU notifiers for the shared mach-shmobile SCU code
to allow removal of the shared SCU boot_secondary code.

Regarding notifiers, at CPU_UP_PREPARE time the SMP boot
vector is initialized so secondary CPU cores can boot.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add r8a7790 SMP support using the shared APMU code. To enable
SMP the r8a7790 specific DTS needs to be updated to include
CPU cores, and this is happening in a separate patch.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Introduce shared APMU SMP code for mach-shmobile. Both SMP boot up
and CPU Hotplug is supported. This version does not use DT but
if needed this will be added as an incremental feature patch.

The code is designed around CONFIG_NR_CPUS and should in theory support
any number of APMUs, however due to the current DT-less static design
only a single APMU is supported.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

USB phy initialisation function is needed from not only
USB Host but also USB Function too.
This patch adds usb phy common control function.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch adds USBHS clock for renesas_usbhs driver

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add r8a7791 CMT support via channel 0 of CMT0. At this
point the CMT is used for clock event operation, but in
the future the arch timer will be the main timer and the
CMT will be used for deep sleep wake up only.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a7663b88280d00359715817620798e99d54d401c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add SCIF serial port support to the r8a7791 SoC by
adding platform devices for SCIFA0 -> SCIFA5 as well
as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF5 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.

Signed-off-by: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, dropped holes in enum]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add initial support for the r8a7791 SoC including:
 - Single Cortex-A15 CPU Core
 - GIC

No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, dropped not-yet-ready code]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Introduce shmobile_boot_size that can be used by
future SMP code to determine the size of the boot
code that needs to be copied to internal SRAM.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Expose shmobile_invalidate_start() in common.h for
mach-shmobile. This function will be used for boot of
secondary processors on future non-SCU SMP platforms.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Remove shmobile_smp_init_cpus() since all SMP platforms in
mach-shmobile now rely on DT for CPU core description instead
of for instance determining number of cores from the SCU.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Use shmobile_smp_cpu_disable() on sh73a0 since it
allows CPU Hotplug of any CPU.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Introduce the shared CPU Hotplug function shmobile_smp_cpu_disable()
for mach-shmobile. It is useful for the case when all CPUs may be
hotplugged, including CPU 0.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a platform clock for the r8a7778 SRU/SSI sound.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The DU device will be called rcar-du-r8a7779. Rename the clock lookup
entry accordingly.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Platform data and resources for core devices are kmemdup()ed when the
corresponding devices are registered and can thus be declared as const.
Do so.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Rename r8a7790_init_delay() into r8a7790_init_early()
to make the function name show that more than just
delay setup may happen in the future.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Rename r8a73a4_init_delay() into r8a73a4_init_early()
to make the function name show that more than just
delay setup may happen in the future.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>