- Dec 18, 2014
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Rob Clark authored
For atomic drivers, we won't use the values array but instead shunt things off to obj->atomic_get_property(). So to simplify things make all read/write of properties values go through the accessors. Signed-off-by:
Rob Clark <robdclark@gmail.com> Reviewed-by:
Sean Paul <seanpaul@chromium.org> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Rob Clark authored
Keep property pointer, instead of id, in per mode-object attachments. This will simplify things in later patches. Signed-off-by:
Rob Clark <robdclark@gmail.com> Reviewed-by:
Sean Paul <seanpaul@chromium.org> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Rob Clark authored
We can already have object properties, which technically can be fb's. Switch the property validation logic over to a get/put style interface so it can take a ref to refcnt'd objects, and then drop that ref after the driver has a chance to take it's own ref. Signed-off-by:
Rob Clark <robdclark@gmail.com> Reviewed-by:
Sean Paul <seanpaul@chromium.org> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Daniel Vetter authored
Useful since this way we can pass around just the state objects and will get ther real object, too. Specifically this allows us to again simplify the parameters for set_crtc_for_plane. v2: msm already has it's own specific plane_reset hook, don't forget that one! v3: Fixup kerneldoc, reported by 0-day builder. Cc: Rob Clark <robdclark@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> (v2) Tested-by: Rob Clark <robdclark@gmail.com> (v2) Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com>
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Daniel Vetter authored
This essentially reverts commit 934ce1c2 Author: Rob Clark <robdclark@gmail.com> Date: Wed Nov 19 16:41:33 2014 -0500 drm/atomic: check mode_changed *after* atomic_check Depending upon the driver both orders (or maybe even interleaving) is required: - If ->atomic_check updates ->mode_changed then helper_check_modeset must be run afters. - If ->atomic_check depends upon accurate adjusted dotclock values for e.g. watermarks, then helper_check_modeset must be run first. The failure mode in the first case is usually a totally angry hw because the pixel format switching doesn't happen. The failure mode in the later case is usually nothing, since in most cases the old adjusted mode from the previous modeset wont be too far off to be a problem. So just underruns and perhaps even just suboptimal (from a power consumption) watermarks. Furthermore in the transitional helpers we only call ->atomic_check after the new modeset state has been fully set up (and hence computed). Given that asymmetry in expected failure modes I think it's safer to go back to the older order. So do that and give msm a special check function to compensate. Also update kerneldoc to explain this a bit. v2: Actually add the missing hunk Rob spotted. v3: Move msm_atomic_check into msm_atomic.c, requested by Rob. Cc: Rob Clark <robdclark@gmail.com> Reviewed-by:
Rob Clark <robdclark@gmail.com> Tested-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com>
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Daniel Vetter authored
The default call sequence for these two parts won't fit for all drivers. So export the two pieces and explain with a bit of kerneldoc when each should be called. v2: Squash in fixup from Rob to actually add the newly exported functions to headers Cc: Rob Clark <robdclark@gmail.com> Reviewed-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com>
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Rob Clark authored
When a plane is being enabled, plane->crtc has not been set yet. Use plane->state->crtc. Signed-off-by:
Rob Clark <robdclark@gmail.com> Reviewed-by:
Sean Paul <seanpaul@chromium.org> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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- Dec 15, 2014
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benjamin.gaignard@linaro.org authored
When compiling in module some symbol aren't missing, export them correctly. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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- Dec 13, 2014
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Dave Airlie authored
Merge branch 'drm-sti-next-2014-12-11' of http://git.linaro.org/people/benjamin.gaignard/kernel into drm-next This series of patches fix various issues in STI drm driver. Now HDMI i2c adapter could be selected in device tree and plug detection doesn't use gpio anymore. I also had fix some signal timing problems after testing the driver on more hardware. The remaining patches attemps to simplify the code and prepare the next evolutions like DVO and auxiliary CRTC support * 'drm-sti-next-2014-12-11' of http://git.linaro.org/people/benjamin.gaignard/kernel: drm: sti: correctly cleanup CRTC and planes drm: sti: add HQVDP plane drm: sti: add cursor plane drm: sti: enable auxiliary CRTC drm: sti: fix delay in VTG programming drm: sti: prepare sti_tvout to support auxiliary crtc drm: sti: use drm_crtc_vblank_{on/off} instead of drm_vblank_{on/off} drm: sti: fix hdmi avi infoframe drm: sti: remove event lock while disabling vblank drm: sti: simplify gdp code drm: sti: clear all mixer control drm: sti: remove gpio for HDMI hot plug detection drm: sti: allow to change hdmi ddc i2c adapter
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- Dec 12, 2014
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Dave Airlie authored
Merge tag 'drm-intel-next-fixes-2014-12-11' of git://anongit.freedesktop.org/drm-intel into drm-next Here's a batch of i915 fixes for 3.19. * tag 'drm-intel-next-fixes-2014-12-11' of git://anongit.freedesktop.org/drm-intel: drm/i915: save/restore GMBUS freq across suspend/resume on gen4 drm/i915: Remove '& 0xffff' from the mask given to WA_REG() drm/i915: Invert the mask and val arguments in wa_add() and WA_REG() drm/i915/bdw: Fix the write setting up the WIZ hashing mode drm/i915: Don't complain about stolen conflicts on gen3 drm/i915: resume MST after reading back hw state drm/i915: Handle inaccurate time conversion issues drm/i915: compute wait_ioctl timeout correctly drm/i915: don't always do full mode sets when infoframes are enabled
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- Dec 11, 2014
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Jesse Barnes authored
Should probably just init this in the GMbus code all the time, based on the cdclk and HPLL like we do on newer platforms. Ville has code for that in a rework branch, but until then we can fix this bug fairly easily. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76301 Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by:
Nikolay <mar.kolya@gmail.com> Cc: stable@vger.kernel.org Signed-off-by:
Jani Nikula <jani.nikula@intel.com>
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Benjamin Gaignard authored
When bind failed make sure that CRTC and planes are completely clean up to avoid properties duplication. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
High Quality Video Data Plane is hardware IP dedicated to video rendering. Compare to GPD (graphic planes) it have better scaler capabilities. HQVDP use VID layer to push data into hardware compositor without going into DDR. From data flow point of view HQVDP and VID are nested so HQVPD update/disable VID. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
stih407 SoC have a dedicated hardware cursor plane, this patch enable it. The hardware have a color look up table, fix it to be able to use ARGB8888. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
For stih407 SoC enable the second mixer to get two CRTC. Allow GPD planes and encoders to be connected to this new CRTC. Cursor plane can only be set on first CRTC. GPD clocks needed change the parent clock depending on which CRTC GPD are used. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
The HDMI path introduce a delay of 6 pixels. This delay should be take into account while programming VTG for the HDMI. Without this delay, the HDMI active window area is shift of 6 pixel on the right. Set also timing for DVO output. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
Change some functions prototype to prepare the introduction of auxiliary crtc. It will also help to have a DVO encoder. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
Make sure that vblank is enabled when crtc commit is call. Replace drm_vblank_off() by drm_crtc_vblank_off() Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
The hardware expect to have the infoframe checksum in the first byte. In consequence shift all infoframe on one byte. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
Stop use event_lock in vblank disable function. This was creating a dead lock. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
Store the physical address at node creation time to avoid use of virt_to_dma and dma_to_virt everywhere Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
Make sure that mixer control register is correctly reset before use it. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
gpio used for HDMI hot plug detection is useless, HDMI_STI register contains an hot plug detection status bit. Fix binding documentation. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Benjamin Gaignard authored
Depending of the board configuration i2c for ddc could change, this patch allow to use a phandle to specify which i2c controller to use. Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Laurent Pinchart authored
And fix a spelling mistake. Signed-off-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Merge drm core fixes from Daniel. * tag 'topic/core-stuff-2014-12-10' of git://anongit.freedesktop.org/drm-intel: drm: Zero out DRM object memory upon cleanup drm: fix a typo in a comment drm: fix a word repetition in a comment drm: Fix memory leak at error path of drm_read() drm/Documentation: Fix rowspan value in drm-kms-properties drm/edid: Restore kerneldoc consistency drm/edid: new drm_edid_block_checksum helper function V3 drm/edid: shorten log output in case of all zeroes edid block drm/edid: move drm_edid_is_zero to top, make edid argument const
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- Dec 10, 2014
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Damien Lespiau authored
We may be hidding bugs by doing that, so let remove it and have the actual mask value shine through, for better or worse. Signed-off-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com>
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Damien Lespiau authored
While trying to unify the order of those arguments throughout the driver, Daniel noticed what we were inverting them in this part of the code. Suggested-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com>
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Thierry Reding authored
Drivers where the DRM objects have a lifetime that extends beyond that of the DRM device need to zero out the DRM object memory to void stale data such as properties. The DRM core code expects to operate on newly allocated and zeroed out objects and will behave unexpectedly, such as add duplicate properties, otherwise. Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Damien Lespiau authored
I was playing with clang and oh surprise! a warning trigerred by -Wshift-overflow (gcc doesn't have this one): WA_SET_BIT_MASKED(GEN7_GT_MODE, GEN6_WIZ_HASHING_MASK | GEN6_WIZ_HASHING_16x4); drivers/gpu/drm/i915/intel_ringbuffer.c:786:2: warning: signed shift result (0x28002000000) requires 43 bits to represent, but 'int' only has 32 bits [-Wshift-overflow] WA_SET_BIT_MASKED(GEN7_GT_MODE, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/intel_ringbuffer.c:737:15: note: expanded from macro 'WA_SET_BIT_MASKED' WA_REG(addr, _MASKED_BIT_ENABLE(mask), (mask) & 0xffff) Turned out GEN6_WIZ_HASHING_MASK was already shifted by 16, and we were trying to shift it a bit more. The other thing is that it's not the usual case of setting WA bits here, we need to have separate mask and value. To fix this, I've introduced a new _MASKED_FIELD() macro that takes both the (unshifted) mask and the desired value and the rest of the patch ripples through from it. This bug was introduced when reworking the WA emission in: Commit 7225342a Author: Mika Kuoppala <mika.kuoppala@linux.intel.com> Date: Tue Oct 7 17:21:26 2014 +0300 drm/i915: Build workaround list in ring initialization v2: Invert the order of the mask and value arguments (Daniel Vetter) Rewrite _MASKED_BIT_ENABLE() and _MASKED_BIT_DISABLE() with _MASKED_FIELD() (Jani Nikula) Make sure we only evaluate 'a' once in _MASKED_BIT_ENABLE() (Dave Gordon) Add check to ensure the value is within the mask boundaries (Chris Wilson) v3: Ensure the the value and mask are 16 bits (Dave Gordon) Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Arun Siluvery <arun.siluvery@linux.intel.com> Signed-off-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com>
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Daniel Vetter authored
Apparently stuff works that way on those machines. I agree with Chris' concern that this is a bit risky but imo worth a shot in -next just for fun. Afaics all these machines have the pci resources allocated like that by the BIOS, so I suspect that it's all ok. This regression goes back to commit eaba1b8f Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jul 4 12:28:35 2013 +0100 drm/i915: Verify that our stolen memory doesn't conflict Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76983 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71031 Tested-by:
lu hua <huax.lu@intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by:
Paul Menzel <paulepanter@users.sourceforge.net> Cc: stable@vger.kernel.org Signed-off-by:
Jani Nikula <jani.nikula@intel.com>
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- Dec 09, 2014
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Martin Peres authored
Spotted while reviewing the DRM changes in Linux 3.18 for LinuxFR. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Martin Peres <martin.peres@free.fr> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Martin Peres authored
Spotted while reviewing the DRM changes in Linux 3.18 for LinuxFR. CC: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Martin Peres <martin.peres@free.fr> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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ssh://people.freedesktop.org/~/linuxDave Airlie authored
Merge mst tiling patches and MST fixes * 'drm-mst-next' of ssh://people.freedesktop.org/~/linux: drm/fb: add support for tiled monitor configurations. (v2) drm/tile: expose the tile property to userspace (v3) drm/connector: store tile information from displayid (v3) drm/mst: cached EDID for logical ports (v2) drm: add tile_group support. (v3) drm/displayid: add displayid defines and edid extension (v2) drm/dp-mst: Remove branches before dropping the reference drm/fb_helper: move deferred fb checking into restore mode (v2) drm/dp: retry AUX transactions 32 times (v1.1)
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Dave Airlie authored
This adds fbdev/con support for tiled monitors, so that we only set a mode on the correct half of the monitor, or span the two halves if needed. v2: remove unneeded ERROR, fix | vs || Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
This takes the tiling info from the connector and exposes it to userspace, as a blob object in a connector property. The contents of the blob is ABI. v2: add property + function documentation. v3: move property setup from previous patch. add boilerplate + fix long line (Daniel) Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
This creates a tile group from DisplayID block, and stores the pieces of parsed info from the DisplayID block into the connector. v2: add missing signoff, add new connector bits to docs. v3: remove some debugging. Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
Logical ports are never going to have EDID changes, they are used for the internal ports on MST monitors. We cache the EDIDs from these to save time at MST probe. v2: drop misplace tile property line, meant for other patch. Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
A tile group is an identifier shared by a single monitor, DisplayID topology has 8 bytes we can use for this, just use those for now until something else comes up in the future. We assign these to an idr and use the idr to tell userspace what connectors are in the same tile group. DisplayID v1.3 says the serial number must be unique for displays from the same manufacturer. v2: destroy idr (dvdhrm) add docbook (danvet) airlied:- not sure how to make docbook add fns to tile group section. v3: fix missing unlock. Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
These are just taken from the DisplayID v1.3 spec, and the DDC spec. v2: use __packed (Jani) Signed-off-by:
Dave Airlie <airlied@redhat.com>
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