- Mar 12, 2015
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Simon Guinot authored
This patch adds the DT description for the LaCie "2Big NAS" (nas2big). This NAS is an hardware upgrade of the 2Big Network v2. Chipset and device list: - CPU Marvell 88F6282 1600Mhz - SDRAM memory, 256MB DDR3 (2x128MB x8) 533Mhz - 1 Ethernet Gigabit port (PHY Marvell 88E1518) - Flash memory, NAND 256MB TSOP48 - I2C EEPROM, 512 bytes (AT24 type) - PCIe SATA controller JMicron JMB360 (eSATA) - I2C fan controller GMT G762 (with a separate alarm GPIO) - 1 USB2 host port - 1 push button - 1 power switch - 2 SATA LEDs (bi-color, blue and red) - 1 power LED (bi-color, blue and red) - CPLD for LEDs and start-up management (Altera Max EMP3064) Signed-off-by:
Simon Guinot <simon.guinot@sequanux.org> Acked-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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- Mar 04, 2015
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Thomas Petazzoni authored
This commit adds the Device Tree files for the Armada 39x family of processors, as well as one Armada 398 Development Board. Like for other Marvell EBU families, a common armada-39x.dtsi contains the description of the common features of all Armada 39x SoCs, while armada-390.dtsi and armada-398.dtsi respectively describe the specificities of those SoCs. Finally, an armada-398-db.dts file is added to describe the Armada 398 Development Board itself. So far, the following features are supported: * SMP: dual Cortex-A9 * Basic ARM IPs: SCU, timer, GIC, L2 cache * Basic Marvell IPs: pin-muxing, clocks, system controller, MBus controller, MPIC interrupt controller, timer, CPU reset for SMP, PMSU. * I2C * SPI * SDHCI * XOR * NAND * UART * PCIe Additional features will be supported in the future. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
The Device Tree nodes describing the MPIC nodes on Armada 370, 375, 38x and XP had a unit address that did not match the first reg property, as suggested by the ePAPR. This commit fixes that. [gregory.clement@free-electrons.com: removed the armada-38x part, as it was already applied by a previous patch] Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
This commit adds the stdout-path property in /chosen for all Armada boards that were not yet carrying this property, and gets rid of /chosen/bootargs which becomes unneeded: earlyprintk should not be used by default, and the console= parameter is replaced by the /chosen/stdout-path property. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
This commit adds 'serialX' aliases for the various serial ports on Armada 370, 375, 38x and XP platforms. It will allow the usage of the stdout-path property. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
Having aliases for Ethernet devices is useless, since the networking subsystem unfortunately doesn't care about aliases to name network interfaces. Note that the 'aliases' nodes in armada-370-xp.dtsi and armada-xp.dtsi become empty, but that we keep it as is since a followup patch will re-add some aliases to it. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
This commit adds the standard uart0 and uart1 DT labels to the Device Tree description of the Marvell Armada 375 SoC. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
The Armada 38x had a label for UART0, but not UART1. This commit fixes that. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Thomas Petazzoni authored
On Marvell Armada 38x, the USB2 controller registers are at 0x58000, so the corresponding Device Tree node should have a unit address of 58000, and not 50000. We were using 50000 due to an incorrect copy/pastebin of Armada 370/XP code. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Maxime Ripard authored
The Armada 385 Access Point Development Board has a 1GB NAND SLC chip from Micron as its main storage. Enable it. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Andrew Lunn authored
Add a DSA section to the DT blob representing the Ethernet switch. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Simon Guinot authored
On the LaCie 2Big Network v2 (net2big_v2) board, the fan alarm is not wired to the I2C fan controller but to a separe GPIO. This GPIO can be controlled by using the gpio-fan driver. This patch adds the gpio-fan alarm description in the net2big_v2 DTS. Signed-off-by:
Simon Guinot <simon.guinot@sequanux.org> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Maxime Ripard authored
The unit-address is supposed to be equal the first reg address, which is not the case for the MPIC, that uses the mbus-controller one. Fix this. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Sebastian Hesselbarth authored
This add common pinctrl settings for pcie[01]_clkreq, spi1, i2c[23], and internal i2c mux. These settings have either one or two options only, so put them into the SoC dtsi instead of repeating them on board level. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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- Feb 27, 2015
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Sebastian Hesselbarth authored
Add pcie[01] node labels to allow to reference them easily from board level. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Sebastian Hesselbarth authored
We want to enforce the use of named flags in GPIO and interrupt specifiers, include the corresponding headers to Dove's SoC dtsi. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Sebastian Hesselbarth authored
Fix Dove's register addresses of uart2 and uart3 nodes that seem to be broken since ages due to a copy-and-paste error. Cc: <stable@vger.kernel.org> # 3.7+ Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Imre Kaloz authored
The Linksys WRT1900AC (Mamba) is a router that has - 2 mini-PCIe slots with Marvell 88W8864 radios - 1 USB 3.0 port - 1 USB 2.0/eSATAp port - 2 Ethernet interfaces connected to a 88E6172 switch (1x WAN + 4x LAN) - 128MB NAND flash - 256MB RAM gregory.clement@free-electrons.com: - add ARM to the title - fix the reference to CONFIG_DEBUG_MVEBU_UART0_ALTERNATE - fix the unbalanced comment for the syscfg partition Signed-off-by:
Imre Kaloz <kaloz@openwrt.org> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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- Feb 23, 2015
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Gregory CLEMENT authored
The Device Tree description of SDHCI on Armada 388 RD board was missing. This commit adds the node for it. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Gregory CLEMENT authored
The binding of the armada-380-sdhci has been extended with a new register in order to be able to use the SDR50 and DDR50 mode. This commit add the resource associated to this new register for the Armada 38x. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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Gregory CLEMENT authored
Instead of hardcoding the values of the interrupt flags, use the macros provided by <include/dt-bindings/interrupt-controller/irq.h> and <include/dt-bindings/interrupt-controller/arm-gic.h> for the Armada 38x SDHCI node. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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David Howells authored
Convert the following where appropriate: (1) S_ISLNK(dentry->d_inode) to d_is_symlink(dentry). (2) S_ISREG(dentry->d_inode) to d_is_reg(dentry). (3) S_ISDIR(dentry->d_inode) to d_is_dir(dentry). This is actually more complicated than it appears as some calls should be converted to d_can_lookup() instead. The difference is whether the directory in question is a real dir with a ->lookup op or whether it's a fake dir with a ->d_automount op. In some circumstances, we can subsume checks for dentry->d_inode not being NULL into this, provided we the code isn't in a filesystem that expects d_inode to be NULL if the dirent really *is* negative (ie. if we're going to use d_inode() rather than d_backing_inode() to get the inode pointer). Note that the dentry type field may be set to something other than DCACHE_MISS_TYPE when d_inode is NULL in the case of unionmount, where the VFS manages the fall-through from a negative dentry to a lower layer. In such a case, the dentry type of the negative union dentry is set to the same as the type of the lower dentry. However, if you know d_inode is not NULL at the call site, then you can use the d_is_xxx() functions even in a filesystem. There is one further complication: a 0,0 chardev dentry may be labelled DCACHE_WHITEOUT_TYPE rather than DCACHE_SPECIAL_TYPE. Strictly, this was intended for special directory entry types that don't have attached inodes. The following perl+coccinelle script was used: use strict; my @callers; open($fd, 'git grep -l \'S_IS[A-Z].*->d_inode\' |') || die "Can't grep for S_ISDIR and co. callers"; @callers = <$fd>; close($fd); unless (@callers) { print "No matches\n"; exit(0); } my @cocci = ( '@@', 'expression E;', '@@', '', '- S_ISLNK(E->d_inode->i_mode)', '+ d_is_symlink(E)', '', '@@', 'expression E;', '@@', '', '- S_ISDIR(E->d_inode->i_mode)', '+ d_is_dir(E)', '', '@@', 'expression E;', '@@', '', '- S_ISREG(E->d_inode->i_mode)', '+ d_is_reg(E)' ); my $coccifile = "tmp.sp.cocci"; open($fd, ">$coccifile") || die $coccifile; print($fd "$_\n") || die $coccifile foreach (@cocci); close($fd); foreach my $file (@callers) { chomp $file; print "Processing ", $file, "\n"; system("spatch", "--sp-file", $coccifile, $file, "--in-place", "--no-show-diff") == 0 || die "spatch failed"; } [AV: overlayfs parts skipped] Signed-off-by:
David Howells <dhowells@redhat.com> Signed-off-by:
Al Viro <viro@zeniv.linux.org.uk>
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- Feb 21, 2015
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Niklas Cassel authored
Commit e9de688d ("irqchip: mips-gic: Support local interrupts") updated several platforms. This is a copy paste error. Signed-off-by:
Niklas Cassel <niklass@axis.com> Reviewed-by:
Andrew Bresticker <abrestic@chromium.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9245/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Andreas Ruprecht authored
In commit c441d4a5 ("MIPS: mm: Only build one microassembler that is suitable"), the Makefile at arch/mips/mm was rewritten to only build the "right" microassembler file, depending on whether CONFIG_CPU_MICROMIPS is set or not. In the files, however, there are still preprocessor definitions depending on CONFIG_CPU_MICROMIPS. The #ifdef around them can now never evaluate to true, so let's remove them altogether. This inconsistency was found using the undertaker-checkpatch tool. Signed-off-by:
Andreas Ruprecht <rupran@einserver.de> Reviewed-by:
Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Valentin Rothberg <valentinrothberg@gmail.com> Cc: Paul Bolle <pebolle@tiscali.nl> Patchwork: https://patchwork.linux-mips.org/patch/9267/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Feb 20, 2015
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David Daney authored
- Use of_irq_init() to initialize interrupt controllers - Get rid of some unlikely() - Add CIB to support SATA and other interrupts - Add support for CIU SUM2 interrupt sources Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Leonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by:
Peter Swain <peter.swain@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8947/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
The acknowledge bits don't exist for level triggered irqs, so setting them causes the simulator to terminate. Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Leonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8946/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Chandrakala Chavva authored
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII. Signed-off-by:
Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by:
David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8945/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Chad Reese authored
CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by:
Chad Reese <kreese@caviumnetworks.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8944/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8943/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Add coverage for OCTEON III models. Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8942/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Make messages refer to all CN6XXX. Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8941/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Also update union octeon_cvmemctl with new OCTEON II fields. [aleksey.makarov@auriga.com: use __BITFIELD_FIELD] Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8940/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Disable ICache prefetch for certian Octeon II processors. Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8938/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Aleksey Makarov authored
Commit 2c952e06 ("MIPS: Move cop2 save/restore to switch_to()") removes assembler code to store COP2 registers. Commit a36d8225 ("MIPS: OCTEON: Enable use of FPU") mistakenly restores it Fixes: a36d8225 ("MIPS: OCTEON: Enable use of FPU") Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8937/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Chandrakala Chavva authored
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register, its a 64-bit wide. Signed-off-by:
Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8936/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Allocate new save space, and then save/restore the registers if OCTEON III. Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8935/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
It wasn't being saved on task switch. Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8934/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
The wide multiplier is twice as wide, so we need to save twice as much state. Detect the multiplier type (CPU type) at start up and install model specific handlers. [aleksey.makarov@auriga.com: conflict resolution, support for old compilers] Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Leonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8933/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Markos Chandras authored
Allow more compression algorithms as well as uncompressed uImage.bin to be generated. An uncompressed image might be useful to rule out problems in the decompression code in the bootloader or even speed up the boot process at the expense of a bigger uImage file. Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9271/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Signed-off-by:
David Daney <david.daney@cavium.com> Signed-off-by:
Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8737/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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