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  1. Sep 14, 2016
    • Nishanth Menon's avatar
      ARM: dts: am57xx-beagle-x15: Add support for rev B1 · 0af28cc9
      Nishanth Menon authored
      Latest update to the BeagleBoard-X15 platform (revision B1)[1] updates
      for allowing UHS SD cards to function with the split of supply to SD
      card from a dedicated LDO.
      
      As a result of this, AM57xx BeagleBoard-X15 now uses gpio2_30 instead
      of gpio6_28 for HDMI because HDMI_LS_OE should now be switched from
      GPIO6_28(Y9) to GPIO2_30 (AG8) to avoid a 1.8V GPIO toggling a 3.3V
      SoC input when the SD card is in UHS 1.8V mode.
      
      NOTE: For UHS mode to function, we need full fledged IODelay support
      in kernel to be functional. IODelay support is yet to be added.
      
      Further, It does not make much sense to spin off a new board
      compatible flag since there is no real functional benefit for the
      same.
      
      Note: Even though production version is supposed to be B1, there is
      over ~200 boards of previous version (A2)[2] out there which continue
      to get supported with the existing dts file (to maintain compatibility
      with existing bootloaders for A2) and the production board is now
      supported as revb1.
      
      [1] https://github.com/beagleboard/beagleboard-x15/blob/master/BEAGLEBOARD_X15_REV_B1.pdf
      [2] http://marc.info/?l=linux-arm-kernel&m=147273929820708&w=2
      
      
      
      Tested-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      Signed-off-by: default avatarNishanth Menon <nm@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      0af28cc9
    • Nishanth Menon's avatar
      ARM: dts: am57xx-beagle-x15: Remove pinmux configurations for erratum i869 · d20f997b
      Nishanth Menon authored
      Pinmuxing for DRA7x/AM57x family of processors need to be done in IO
      isolation as part of initial bootloader executed from SRAM. This is
      done as part of iodelay configuration sequence and is required due
      to the limitations introduced by erratum ID: i869[1] (IO Glitches
      can occur when changing IO settings) and elaborated in the Technical
      Reference Manual[2] 18.4.6.1.7 Isolation Requirements.
      
      Only peripheral that is permitted for dynamic pin mux configuration
      is MMC and DCAN. MMC is permitted to change to accommodate the
      requirements for varied speeds (which require IO-delay support in
      kernel as well). DCAN is a result of i893[1] (DCAN initialization
      sequence). However, since we don't use DCAN on X15, with the exception
      of MMC, all other pin mux configurations are removed from the dts.
      
      [1] http://www.ti.com/lit/pdf/sprz429
      [2] http://www.ti.com/lit/pdf/sprui30
      
      
      
      Signed-off-by: default avatarNishanth Menon <nm@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      d20f997b
    • Tony Lindgren's avatar
      ARM: dts: Fix LEDs for igepv5 · e7ee0bc6
      Tony Lindgren authored
      
      
      The LEDs on igepv5 are on the GPIO expander unlike on omap5-uevm.
      
      Configuration copied from git.isee.biz git tree except fixed for
      red and blue mapping.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      e7ee0bc6
    • Tony Lindgren's avatar
      ARM: dts: Add power button support for igepv5 · b118c6a6
      Tony Lindgren authored
      
      
      Add power button support for igepv5.
      
      Cc: Agustí Fontquerni i Gorchs <afontquerni@iseebcn.com>
      Cc: Enric Balletbo Serra <eballetbo@gmail.com>
      Cc: Javier Martinez Canillas <javier@osg.samsung.com>
      Cc: Pau Pajuel <ppajuel@gmail.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      b118c6a6
    • Tony Lindgren's avatar
      ARM: dts: Configure omap5 OTG ID pin · 952a5db0
      Tony Lindgren authored
      
      
      The ID pin GPIO comes from the PMIC. Let's configure it as a GPIO
      for the driver to use, and also make sure the PMIC GPIO pin muxing
      is correct. The PMIC pad1 and 2 values for omap5-uevm and igepv5 are
      0x5a and 0x1b, we only need to clear bit 2 in pad1 register to make
      the ID pin GPIO work.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      952a5db0
    • Tony Lindgren's avatar
      ARM: dts: ARM: dts: Fix omap5 SDIO dat1 interrupt · 08f9268b
      Tony Lindgren authored
      
      
      Few changes to fix issues I've noticed while debugging omap5-uevm
      wl18xx issues:
      
      1. Move wlcore irq pin muxing under wlcore. This irq could be
         different from gpio_wk14 on some board variants
      
      2. Don't configure pull on wlcore irq pin. There is a 10k
         pull up resistor R105 on the device to VDDS_1v8_MAIN
      
      3. The padconf register for wlsdio_data1 is wrong, it's really
         at 0x1a8 + 2 - 0x40 = 0x16a offset, not at 0x168 as that's
         for wlsdio_data0
      
      4. Mark the omap5-uevm wlan as compatible with ti,wl1837 as
         that's what the TDK R078 part seems to be
      
      5. The MMC interrupt for WLAN musb be wakeupgen, not gic
      
      Looks like omap5-uevm WLAN behaves better now, but I still seem
      to have issues with some access points.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      08f9268b
    • Tony Lindgren's avatar
      ARM: dts: Configure panda SDIO WLAN wakeirq · 84ae4974
      Tony Lindgren authored
      
      
      Otherwise we have delays on noticing interrupts from the
      WLAN card when idle.
      
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      84ae4974
  2. Aug 31, 2016
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