Adds support for the Broadcom reference board BCM947189ACDMBR which
features the following:

* 128MB of DRAM
* External MoCA support through a Broadcom BCM6802 chip
* 1x external Gigabit PHY through the external BCM6802
* 1x USB 2.0 port
* 1x PCIE slot
* Few configurable buttons and LEDs

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

This uses trigger-sources documented in commit 80dc6e1c ("dt-bindings:
leds: document new trigger-sources property") to specify USB ports. Such an
information can be used by operating system to setup LEDs behavior.

I updated dts files for 7 devices I own and I was able to test.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

This uses the existing Northstar USB3 PHY driver to enable the USB3
ports on NSP.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

The rest of the DTSI file is in incrementing addresses, but the USB
OHCI/ECHI entries are out of sequence.  Move them to put them in the
proper place.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Cache related issues with DMA rings and performance issues related to
caching are being caused by not properly setting the "dma-coherent" flag
in the device tree entries.  Adding it here to correct the issue.

Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: 3107fa5b ("ARM: dts: NSP: Add SD/MMC support")
Fixes: 13d04f20 ("ARM: dts: NSP: Add AMAC entries")
Fixes: 5aeda7bf ("ARM: dts: NSP: Add and enable amac2")
Fixes: 17d51717 ("ARM: dts: NSP: Add mailbox (PDC) to NSP")
Fixes: 1d8ece66 ("ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree")
Fixes: 0f9f27a3 ("ARM: dts: NSP: Add I2C support to the DT")
Fixes: 8dbcad02 ("ARM: dts: nsp: Add sata device tree entry")
Fixes: 52219902 ("ARM: dts: NSP: Fix PCIE DT issue")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Northstar has 3 controllers: OHCI and EHCI (each with 2 ports) and XHCI
(with just 1 port). Describe them in the DT. In future this will allow
to reference them as trigger sources.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

BCM2837 is somewhat unusual in that we build its DT on both arm32 and
arm64.  Most devices are being run in arm32 mode.

Having the body of the DT for 2837 separate from 2835/6 has been a
source of pain, as we often need to make changes that span both
directories simultaneously (for example, the thermal changes for 4.13,
or anything that changes the name of a node referenced by '&' from
board files).  Other changes are made more complicated than they need
to be, such as the SDHOST enabling, because we have to split a single
logical change into a 283[56] half and a 2837 half.

To fix this, make the stub board include file live in arm64 instead of
arm32, and keep all of BCM283x's contents in arm32.  From here on, our
changes to DT contents can be submitted through a single tree.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

This reverts commits 2c0cba48 ("arm: sun8i: sunxi-h3-h5: Add dt node
for the syscon control module") to 2428fd0f ("arm64: defconfig: Enable
dwmac-sun8i driver on defconfig") and 3432a86e ("arm: sun8i:
orangepipc: use internal phy-mode") to 5a79b4f2 ("arm: sun8i:
orangepi-2: use internal phy-mode") that should be merged
through the arm-soc tree, and end up in merge conflicts and build failures.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Since the PHY used is internal, simply set phy-mode as internal.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Since the PHY used is internal, simply set phy-mode as internal.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Since the PHY used is internal, simply set phy-mode as internal.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Since the PHY used is internal, simply set phy-mode as internal.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Since the PHY used is internal, simply set phy-mode as internal.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Use 'clock-frequency' binding for the i2c node that will put the I2C driver
into the standard operating mode. 'speed-mode' was not a valid binding for
the I2C driver, remove it.

Signed-off-by: Alan Tull <atull@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Add DT alias for the second ethernet present on mainboard rev 1.10.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Drop the LED node from VINing FPGA DT because the LED wiring is
different on each mainboard revision. This wiring is therefore
handled in mainboard DT Overlays.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Remove the EEPROMs attached to the I2C expander ports which
lead to the backplane slots from the main VIN|ING DTS file.
These EEPROMs are bound using separate DTO files, which lets
us handle both two-slot and six-slot configuration of the
backplane.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Enable the QSPI node and add the flash chips.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

The ethernet block clock phandle must point to the clock node which
represents the clock which directly supply the ethernet block. This
is emac_x_clk , not emacx_clk , so fix this.

From: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Compiling the DT file with W=1, DTC warns like follows:

Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property

Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>

commit 94647a30 ("ARM: dts: omap3-overo: Enable WiFi/BT combo")
while enabling WiFi/BT combo added regulator to trigger the nReset
signal of the Bluetooth module in vqmmc-supply. However BT should be
handled by UART. Moreover "vqmmc" is not a defined binding for
omap_hsmmc. While "vqmmc" in mmc2 hasn't caused any issues so far,
mmc2 will start to mis-behave once omap_hsmmc defines "vqmmc"
binding.

Remove "vqmmc-supply" property in mmc2 here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

Add Smart Power System node for PM domains.

Signed-off-by: Andreas Färber <afaerber@suse.de>

Use a custom S500 enable-method for all CPUs.

Signed-off-by: Andreas Färber <afaerber@suse.de>

Add Device Trees for Actions Semiconductor S500 SoC and LeMaker Guitar SoM
and base board.

Signed-off-by: Andreas Färber <afaerber@suse.de>

The cm-fx6 module has an on-board AW-NH387 WiFi/BT module which is
based on Marvell's SD8787 chip and is connected to the usdhc1
controller.

Unfortunately, the chip gets unresponsive if the Bluetooth AMP
(Alternate Mac/Phy) function gets probed but the loaded firmware
doesn't support it. For instance, this is the case for the most
recent firmware in linux-firmware (Version 14.66.35.p52).

Thus, just add the required nodes but leave the usdhc1 node disabled
explicitly. Users who disabled the Bluetooth (AMP) support of their
OS can then conveniently enable WiFi (or even plain Bluetooth) support
with a simple device tree overlay/bootloader configuration.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The "test" and "conf" nand partitions partly overlap:

Creating 6 MTD partitions on "orion_nand":
0x000000000000-0x000000090000 : "uboot"
0x000000090000-0x0000000d4000 : "env"
0x0000000d4000-0x0000000f8000 : "test"
0x0000000f4000-0x0000004f4000 : "conf"

That is unlikely to be desired, and not matching the partition map used in
u-boot - So adjust the test partition size to fix this.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.

But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.

So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

The Linksys WRT3200ACM (Rango) is the lates Armada-385 based router in
the Linksys WRT AC Series which got released in October 2016.

Key differences to the earlier Armada-385 based devices in the series is
a bigger flash chip, next generation wireless modules (Marvell 88W8964)
in the mini pcie slots as well as a Marvell SD8887. Finally the CPU is
clocked at 1866 GHz by default.

The file armada-385-linksys-rango.dts is loosly based off of a DTS
authored by Imre Kaloz.

As Rango is part of the armada-385-linksys family of boards use the
armada-385-linksys.dtsi as basis. As for functional differences to Imre
Kaloz dts, the wlan LEDs aren't connected to the expander chip pca9635
but directly to GPIOs. Then mpp47 controls the USB2.0 port and not the
USB3.0 port, so use the correct GPIO mpp44 for it. Finally use
non-removable instead of broken-cd with the sdhci node to avoid polling.

Other changes can be categorized as just cleanup / reorganization due to
using the armada-385-linksys.dtsi.

URL: https://github.com/openwrt/openwrt/blob/0abc3fa5a996daf7dafdc7794ccfe3fa7e955c5a/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-rango.dts


Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Buttons don't have a reg property; drop pseudo address and fixup names
of individual button nodes. Also drop #address-cells and #size-cells
properties.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

A pin group per node is sufficient, further specialization only serves
as documentation which can be a comment just as well. This simplifies
configuring pins for nodes in dependants.

Also use labels which end up right by the node they are intended for.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Move the partition layout to individual boards. The Linksys WRT 3200 ACM
(Rango) comes with a 256MiB nand flash chip and different layout.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Use IEEE 1541-2002 unit prefixes for sizes.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

The new ones work so there is little reason to keep the legacy bindings.
Use the rework as the opportunity to drop the legacy node.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Now that we use the reference for the USB3.0 port update the node name
and labels for the phy and vbus to match the label used by
armada-38x.dtsi.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Which pools we assing doesn't matter. Use the order which doesen't leave
a chance for questions for first time readers.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Drop redundant declaration of #address-cells and #size-cells.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Flatten dts of individual boards to match the new style used in
armada-385-linksys.dtsi and for the Rango addition.

* Caiman - Linksys WRT1200AC v1 & v2
* Cobra - Linksys WRT1900AC v2
* Shelby - Linksys WRT1900ACS v1 & v2

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Add labels to nodes used by dependants. Also rename node gpio_keys to
gpio-keys to match the style of the rest of the file as well as the
documented example.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Since the addition of the spi reference two styles are used. Use
references instead of recreating the same structure over and over again.

This helps to distinguish which are changes to the underlying nodes and
which are new additions and helps maintainability in general.

Verified the resulting dtb to be binary identical.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

There is no rtc for the 98dx3236 and derivative SoCs. Disable the rtc
node inherited from the armada-370-xp base.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>