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  1. Oct 06, 2018
  2. Oct 05, 2018
  3. Oct 04, 2018
  4. Oct 03, 2018
    • Chris Wilson's avatar
      drm/i915/execlists: Flush the CS events before unpinning · bc2477f7
      Chris Wilson authored
      Inside the execlists submission tasklet, we often make the mistake of
      assuming that everything beneath the request is available for use.
      However, the submission and the request live on two separate timelines,
      and the request contents may be freed from an early retirement before we
      have had a chance to run the submission tasklet (think ksoftirqd). To
      safeguard ourselves against any mistakes, flush the tasklet before we
      unpin the context if execlists still has a reference to this context.
      
      v2: Pull hw_context->active tracking into schedule_in and schedule_out.
      
      References: 60367132
      
       ("drm/i915: Avoid use-after-free of ctx in request tracepoints")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20181003110941.27886-1-chris@chris-wilson.co.uk
      bc2477f7
    • Chris Wilson's avatar
      drm/i915: Clear the error PTE just once on finish · 8f5c6fe4
      Chris Wilson authored
      
      
      We do not need to continually clear our dedicated PTE for error capture
      as it will be updated and invalidated to the next object. Only at the
      end do we wish to be sure that the PTE doesn't point back to any buffer.
      
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20181001194447.29910-3-chris@chris-wilson.co.uk
      8f5c6fe4
    • Chris Wilson's avatar
      drm/i915: Handle incomplete Z_FINISH for compressed error states · 83bc0f5b
      Chris Wilson authored
      The final call to zlib_deflate(Z_FINISH) may require more output
      space to be allocated and so needs to re-invoked. Failure to do so in
      the current code leads to incomplete zlib streams (albeit intact due to
      the use of Z_SYNC_FLUSH) resulting in the occasional short object
      capture.
      
      v2: Check against overrunning our pre-allocated page array
      v3: Drop Z_SYNC_FLUSH entirely
      
      Testcase: igt/i915-error-capture.js
      Fixes: 0a97015d
      
       ("drm/i915: Compress GPU objects in error state")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: <stable@vger.kernel.org> # v4.10+
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20181003082422.23214-1-chris@chris-wilson.co.uk
      83bc0f5b
    • Chris Wilson's avatar
      drm/i915/selftests: Hold task_struct ref for smoking kthread · 5ec244f4
      Chris Wilson authored
      As the kthread may terminate itself, the parent must hold a task_struct
      reference for it to call kthread_stop().
      
      <4> [498.827675] stack segment: 0000 [#1] PREEMPT SMP PTI
      <4> [498.827683] CPU: 0 PID: 3872 Comm: drv_selftest Tainted: G     U            4.19.0-rc6-CI-CI_DRM_4915+ #1
      <4> [498.827686] Hardware name: Intel Corporation NUC7CJYH/NUC7JYB, BIOS JYGLKCPX.86A.0027.2018.0125.1347 01/25/2018
      <4> [498.827695] RIP: 0010:kthread_stop+0x36/0x210
      <4> [498.827698] Code: 05 df 3d f6 7e 89 c0 48 0f a3 05 95 f8 29 01 0f 82 56 01 00 00 f0 ff 43 20 f6 43 26 20 0f 84 7f 01 00 00 48 8b ab b0 05 00 00 <f0> 80 4d 00 02 48 89 df e8 5d ff ff ff 48 89 df e8 15 c7 00 00 48
      <4> [498.827701] RSP: 0018:ffffc900003937d0 EFLAGS: 00010202
      <4> [498.827704] RAX: 0000000000000001 RBX: ffff8802165ece40 RCX: 0000000000000001
      <4> [498.827707] RDX: 0000000000000000 RSI: 00000000ffffffff RDI: ffffffff82247460
      <4> [498.827709] RBP: 6b6b6b6b6b6b6b6b R08: 00000000581395cb R09: 0000000000000001
      <4> [498.827711] R10: 0000000000000000 R11: 0000000000000000 R12: ffffc90000393868
      <4> [498.827713] R13: ffffc900003937f0 R14: ffff88026c068040 R15: 0000000000001057
      <4> [498.827716] FS:  00007fc0c464b980(0000) GS:ffff880277e00000(0000) knlGS:0000000000000000
      <4> [498.827718] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      <4> [498.827720] CR2: 000056178c2feca0 CR3: 000000026983c000 CR4: 0000000000340ef0
      <4> [498.827723] Call Trace:
      <4> [498.827824]  smoke_crescendo+0x14c/0x1d0 [i915]
      <4> [498.827837]  ? _raw_spin_unlock_irqrestore+0x4c/0x60
      <4> [498.827898]  ? __i915_gem_context_pin_hw_id+0x69/0x5f0 [i915]
      <4> [498.827902]  ? ida_alloc_range+0x1f2/0x3d0
      <4> [498.827907]  ? __mutex_unlock_slowpath+0x46/0x2b0
      <4> [498.827914]  ? rcu_lockdep_current_cpu_online+0x8f/0xd0
      <4> [498.827979]  live_preempt_smoke+0x2c2/0x470 [i915]
      <4> [498.828047]  __i915_subtests+0x5e/0xf0 [i915]
      <4> [498.828113]  __run_selftests+0x10b/0x190 [i915]
      <4> [498.828175]  i915_live_selftests+0x2c/0x60 [i915]
      <4> [498.828232]  i915_pci_probe+0x50/0xa0 [i915]
      <4> [498.828238]  pci_device_probe+0xa1/0x130
      <4> [498.828244]  really_probe+0x25d/0x3c0
      <4> [498.828249]  driver_probe_device+0x10a/0x120
      <4> [498.828253]  __driver_attach+0xdb/0x100
      <4> [498.828256]  ? driver_probe_device+0x120/0x120
      <4> [498.828259]  bus_for_each_dev+0x74/0xc0
      <4> [498.828264]  bus_add_driver+0x15f/0x250
      <4> [498.828268]  ? 0xffffffffa00c3000
      <4> [498.828271]  driver_register+0x56/0xe0
      <4> [498.828274]  ? 0xffffffffa00c3000
      <4> [498.828278]  do_one_initcall+0x58/0x2e0
      <4> [498.828281]  ? rcu_lockdep_current_cpu_online+0x8f/0xd0
      <4> [498.828285]  ? do_init_module+0x1d/0x1ea
      <4> [498.828289]  ? rcu_read_lock_sched_held+0x6f/0x80
      <4> [498.828293]  ? kmem_cache_alloc_trace+0x264/0x290
      <4> [498.828297]  do_init_module+0x56/0x1ea
      <4> [498.828302]  load_module+0x26f5/0x29d0
      <4> [498.828309]  ? vfs_read+0x122/0x140
      <4> [498.828318]  ? __se_sys_finit_module+0xd3/0xf0
      <4> [498.828321]  __se_sys_finit_module+0xd3/0xf0
      <4> [498.828329]  do_syscall_64+0x55/0x190
      <4> [498.828332]  entry_SYSCALL_64_after_hwframe+0x49/0xbe
      <4> [498.828335] RIP: 0033:0x7fc0c3f16839
      
      Fixes: 992d2098
      
       ("drm/i915/selftests: Split preemption smoke test into threads")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20181002132927.7669-1-chris@chris-wilson.co.uk
      5ec244f4
    • Dhinakaran Pandiyan's avatar
      drm/i915/psr: Enable PSR1 on gen-9+ HW · 598c6cfe
      Dhinakaran Pandiyan authored
      We have new tests and fixes in place since the feature was last
      disabled. Try again for gen-9+ hardware and enable only PSR1 by default as
      a first step.
      v2: Remove typo fix and comment improvements (Rodrigo)
      
      Cc: Jani Nikula <jani.nikula@intel.com>
      Cc: Jose Roberto de Souza <jose.souza@intel.com>
      Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      References: commit 2ee7dc49 ("drm/i915: disable PSR by default on HSW/BDW")
      References: commit dcb2e993
      
       ("Revert "drm/i915: Enable PSR by default on Valleyview and Cherryview."")
      Signed-off-by: default avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
      Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Tested-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180928061117.12394-1-dhinakaran.pandiyan@intel.com
      598c6cfe
  5. Oct 02, 2018