usb: dwc3: dwc3-octeon: Verify clock divider
Although valid USB clock divider will be calculated for all valid Octeon core frequencies, make code formally correct limiting divider not to be greater that 7 so it fits into H_CLKDIV_SEL field. Signed-off-by:Ladislav Michl <ladis@linux-mips.org> Reported-by:
Linux Kernel Functional Testing <lkft@linaro.org> Closes: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log Acked-by:
Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/ZNIM7tlBNdHFzXZG@lenoch Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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