drm/i915/vrr: Make delayed vblank operational in VRR mode on adl/dg2

On adl/dg2 a chicken bit needs to be set for TRANS_SET_CONTENXT_LATENCY
to take effect in VRR mode. Can't really think of a reason why we'd
ever disable that chicken bit, so let's just always set it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230320203352.19515-4-ville.syrjala@linux.intel.com


Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>