net: hns3: add handling of hw errors reported through MSIX
This patch adds handling for HNS3 hardware errors(non-standard) which are reported through MSIX interrupts and not through PCIe AER channel. These MSIX reported hardware errors are handled using common misc. interrupt handler. Hardware error related registers cannot be cleared in context to the interrupt received as they require *heavy* access to hardware using IMP(Integrated Mangement Processor) commands. Hence, we defer the clearing of such error events till later time. Since, we have defered exact identification of errors we will have to defer the level of receovery/reset which might be required. Hence, a new reset type UNKNOWN reset has been introduced which effectively defers the assertion of the reset till we get hold of kind of errors at later time. Signed-off-by:Salil Mehta <salil.mehta@huawei.com> Signed-off-by:
Shiju Jose <shiju.jose@huawei.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
parent
8bb14792
Please register or sign in to comment