tty/serial: pl011: restrict RX burst FIFO threshold

If the associated DMA controller has lower burst length support than the
level the FIFO is set to, then bytes will be left in the RX FIFO at the
end of a DMA block - requiring a round-trip through the timeout interrupt
handler rather than an end-of-block DMA interrupt.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>