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Commit ef87bd81 authored by Dinh Nguyen's avatar Dinh Nguyen Committed by Ulf Hansson
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mmc: dw_mmc-pltfm: socfpga: add method to configure clk-phase



The clock-phase settings for the SDMMC controller in the SoCFPGA
platforms reside in a register in the System Manager. Add a method
to access that register through the syscon interface.

Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20221114230217.202634-4-dinguyen@kernel.org


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent ccfa2466
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