drm/amd/display: fix register write sequence for LINK_SQUARE_PATTERN

[why&how]
write LINK_SQUARE_PATTERN_num + 1 for square pulse pattern.
Specs requirement to write this register prior to write LINK_QUAL_LANEX_SET.

Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>